Soft error analysis and mitigation in circuits involving c-elements

A SEU or soft error is defined as a temporary error on digital electronics due to the effect of radiation. Such an error can cause system failure, e.g. a deadlock in an asynchronous system or production of incorrect outputs due to data corruption. The first part of this thesis studies the impact of...

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Main Author:	Norhuzaimin, bin Julai
Format:	Thesis
Language:	English English
Published:	University of Newcastle 2015
Subjects:	QA75 Electronic computers. Computer science
Online Access:	http://ir.unimas.my/9395/ http://ir.unimas.my/9395/1/Soft%20Error%20Analysis%20and%20Mitigation%20In%20Circuits%20Involving%20C-Elements%2824pages%29.pdf http://ir.unimas.my/9395/2/Soft%20Error%20Analysis%20and%20Mitigation%20In%20Circuits%20Involving%20C-Elements.pdf

id	unimas-9395
recordtype	eprints
spelling	unimas-93952015-11-05T02:14:22Z http://ir.unimas.my/9395/ Soft error analysis and mitigation in circuits involving c-elements Norhuzaimin, bin Julai QA75 Electronic computers. Computer science A SEU or soft error is defined as a temporary error on digital electronics due to the effect of radiation. Such an error can cause system failure, e.g. a deadlock in an asynchronous system or production of incorrect outputs due to data corruption. The first part of this thesis studies the impact of process variation, temperature, voltage and size scaling within the same process on the vulnerability of the nodes of C-element circuits. The objectives are to identify vulnerable to SEU nodes inside a C-element and to find the critical charge needed to flip the output from low to high (0-1) and high to low (1-0) on different implementations of C-elements. In the second part, a framework to compute the SEU error rates is developed. The error rates of circuits are a trade-off between the size of the transistors and the total area of vulnerability. Comparisons of the vulnerability of different configurations of a C-element are made, and error rates are calculated. The third part focuses on soft error mitigation for single and dual rail latches. The latches are able to detect and correct errors due to SEU. The functionalities of the solutions have been validated by simulation. A comprehensive analysis of the performance of the latches under variations of the process and temperature are presented. The fourth part focuses on testing of the new latches. The objective is to design complex systems and incorporate both single rail and dual rail latches in the systems. Errors are injected in the latches and the functionality of the error correcting latches towards the SEU errors are observed at their outputs. The framework to compute error rates and soft error mitigation developed in this thesis can be used by designers in predicting the occurrence of soft error and mitigating soft error in systems. University of Newcastle 2015 Thesis NonPeerReviewed text en http://ir.unimas.my/9395/1/Soft%20Error%20Analysis%20and%20Mitigation%20In%20Circuits%20Involving%20C-Elements%2824pages%29.pdf text en http://ir.unimas.my/9395/2/Soft%20Error%20Analysis%20and%20Mitigation%20In%20Circuits%20Involving%20C-Elements.pdf Norhuzaimin, bin Julai (2015) Soft error analysis and mitigation in circuits involving c-elements. PhD thesis, University of Newcastle, Australia.
repository_type	Digital Repository
institution_category	Local University
institution	Universiti Malaysia Sarawak
building	UNIMAS Institutional Repository
collection	Online Access
language	English English
topic	QA75 Electronic computers. Computer science
spellingShingle	QA75 Electronic computers. Computer science Norhuzaimin, bin Julai Soft error analysis and mitigation in circuits involving c-elements
description	A SEU or soft error is defined as a temporary error on digital electronics due to the effect of radiation. Such an error can cause system failure, e.g. a deadlock in an asynchronous system or production of incorrect outputs due to data corruption. The first part of this thesis studies the impact of process variation, temperature, voltage and size scaling within the same process on the vulnerability of the nodes of C-element circuits. The objectives are to identify vulnerable to SEU nodes inside a C-element and to find the critical charge needed to flip the output from low to high (0-1) and high to low (1-0) on different implementations of C-elements. In the second part, a framework to compute the SEU error rates is developed. The error rates of circuits are a trade-off between the size of the transistors and the total area of vulnerability. Comparisons of the vulnerability of different configurations of a C-element are made, and error rates are calculated. The third part focuses on soft error mitigation for single and dual rail latches. The latches are able to detect and correct errors due to SEU. The functionalities of the solutions have been validated by simulation. A comprehensive analysis of the performance of the latches under variations of the process and temperature are presented. The fourth part focuses on testing of the new latches. The objective is to design complex systems and incorporate both single rail and dual rail latches in the systems. Errors are injected in the latches and the functionality of the error correcting latches towards the SEU errors are observed at their outputs. The framework to compute error rates and soft error mitigation developed in this thesis can be used by designers in predicting the occurrence of soft error and mitigating soft error in systems.
format	Thesis
author	Norhuzaimin, bin Julai
author_facet	Norhuzaimin, bin Julai
author_sort	Norhuzaimin, bin Julai
title	Soft error analysis and mitigation in circuits involving c-elements
title_short	Soft error analysis and mitigation in circuits involving c-elements
title_full	Soft error analysis and mitigation in circuits involving c-elements
title_fullStr	Soft error analysis and mitigation in circuits involving c-elements
title_full_unstemmed	Soft error analysis and mitigation in circuits involving c-elements
title_sort	soft error analysis and mitigation in circuits involving c-elements
publisher	University of Newcastle
publishDate	2015
url	http://ir.unimas.my/9395/ http://ir.unimas.my/9395/1/Soft%20Error%20Analysis%20and%20Mitigation%20In%20Circuits%20Involving%20C-Elements%2824pages%29.pdf http://ir.unimas.my/9395/2/Soft%20Error%20Analysis%20and%20Mitigation%20In%20Circuits%20Involving%20C-Elements.pdf
first_indexed	2018-09-06T15:39:32Z
last_indexed	2018-09-06T15:39:32Z
_version_	1610873173625012224

Soft error analysis and mitigation in circuits involving c-elements

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