Design And Characterization Of Silicon Nanowire Transistor And Logic Nanowire Inverter Circuits

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Design And Characterization Of Silicon Nanowire Transistor And Logic Nanowire Inverter Circuits

The most important limitation in planer MOSFETs is current leakage between the source and the drain at the off-state (IOFF), which presents a critical problem in securing circuit reliability. To mitigate this problem, there are new types of transistors with a 3D structure, including silicon na...

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Bibliographic Details
Main Author:	Naif, Yasir Hashim
Format:	Thesis
Language:	English
Published:	2013
Subjects:	TK1-9971 Electrical engineering. Electronics. Nuclear engineering
Online Access:	http://eprints.usm.my/45223/ http://eprints.usm.my/45223/1/Yasir%20Hashim%20Naif24.pdf

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