Optimized low voltage low power dynamic comparator robust to process, voltage and temperature variation
Power consumption and speed are the main criteria in designing comparator for analog-to-digital converter (ADC). This paper presents an optimized low voltage low power dynamic comparator which is robust to process, voltage and temperature (PVT) variations with adequate speed. The comparator circui...
| Main Authors: | , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
Institute of Advanced Engineering and Science
2020
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| Online Access: | http://psasir.upm.edu.my/id/eprint/87021/ http://psasir.upm.edu.my/id/eprint/87021/1/Optimized%20low%20voltage%20low%20power%20dynamic%20comparator.pdf |