Development of low power viterbi decoder on complex programmable logic device platform
Space Time Trellis Code (STTC) and Viterbi algorithm combinations are known to offer a robust forward error correction system. This especially has been used in a noisy digital communication system such as wireless communication. A traditional Viterbi decoder would contain three main units; Bra...
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| Format: | Thesis |
| Language: | English |
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2018
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| Online Access: | http://psasir.upm.edu.my/id/eprint/71391/ http://psasir.upm.edu.my/id/eprint/71391/1/FK%202018%2089%20IR%2827%29edited.pdf |