High degree of testability using full scan chain and ATPG-An industrial perspective
This study describes an efficient design methodology from an industrial perspective on utilizing Register Transfer Level (RTL) coding style, full scan chain implementation and Automatic Test Pattern Generation (ATPG) to achieve a high percentage of testability in the final Integrated Circuit (IC). T...
| Main Authors: | , , , , |
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| Format: | Citation Index Journal |
| Language: | English |
| Published: |
2009
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| Subjects: | |
| Online Access: | http://scholars.utp.edu.my/id/eprint/458/ http://scholars.utp.edu.my/id/eprint/458/1/paper.pdf |