Non-volatile FPGA architecture using resistive switching devices

Non-volatile FPGA architecture using resistive switching devices

This dissertation reports the research work that was conducted to propose a non-volatile architecture for FPGA using resistive switching devices. This is achieved by designing a Configurable Memristive Logic Block (CMLB). The CMLB comprises of memristive logic cells (MLC) interconnected to each othe...

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Bibliographic Details
Main Author: Ho, Patrick W. C.
Format: Thesis (University of Nottingham only)
Language:English
Published: 2017
Subjects:
non-volatile memory devices
memristors
field programmable gate arrays
resistive switching devices
Online Access:https://eprints.nottingham.ac.uk/39677/

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