Non-volatile FPGA architecture using resistive switching devices
This dissertation reports the research work that was conducted to propose a non-volatile architecture for FPGA using resistive switching devices. This is achieved by designing a Configurable Memristive Logic Block (CMLB). The CMLB comprises of memristive logic cells (MLC) interconnected to each othe...
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| Format: | Thesis (University of Nottingham only) |
| Language: | English |
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2017
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| Online Access: | https://eprints.nottingham.ac.uk/39677/ |