Low parasitic inductance multi-chip SiC devices packaging technology
This paper presents a novel packaging structure which employs stacked substrate and flexible printed circuit board (PCB) to obtain very low parasitic inductance and hence feature high switching speed SiC power devices. A half-bridge module aimed at blocking voltage up to 2.5kV has been designed to a...
| Main Authors: | , , , , |
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| Format: | Conference or Workshop Item |
| Published: |
2016
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| Subjects: | |
| Online Access: | https://eprints.nottingham.ac.uk/37316/ |