VLSI Design of a Wavelet Processing Core
A processing core architecture for the implementation of the discrete wavelet transform (DWT), optimized for throughput, scalability and programmability is proposed. The architecture is based on the RISC architecture with an instruction set specifically designed to facilitate the implementation of w...
| Main Authors: | , |
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| Format: | Article |
| Language: | English |
| Published: |
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
2006
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| Subjects: | |
| Online Access: | http://shdl.mmu.edu.my/3250/ http://shdl.mmu.edu.my/3250/1/1299.pdf |