VHDL modelling of the open short tester
IC (Integrated Circuitry) testing requires the very advanced and sophisticated Advance Test Equipment (ATE) that costs multi million USD. The cost of IC testing is increasing yearly and it will exceed the cost of manufacturing in future. The manufacturers are interested to lower down the manufacturi...
| Main Authors: | , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
World Scientific and Engineering Academy and Society (WSEAS)
2007
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| Subjects: | |
| Online Access: | http://shdl.mmu.edu.my/3190/ http://shdl.mmu.edu.my/3190/1/VHDL%20modelling%20of%20the%20open%20short%20tester.pdf |
| _version_ | 1848790258971312128 |
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| author | Pang, Wai Leong Chew, Kok Wai Choong, Florence Chiao Mei Chan, C. L. |
| author_facet | Pang, Wai Leong Chew, Kok Wai Choong, Florence Chiao Mei Chan, C. L. |
| author_sort | Pang, Wai Leong |
| building | MMU Institutional Repository |
| collection | Online Access |
| description | IC (Integrated Circuitry) testing requires the very advanced and sophisticated Advance Test Equipment (ATE) that costs multi million USD. The cost of IC testing is increasing yearly and it will exceed the cost of manufacturing in future. The manufacturers are interested to lower down the manufacturing cost. Low cost tester is one of the options to reduce the manufacturing cost. The low cost FPGA realization of Open/Short Test on IC is introduced to reduce the IC test cost. The open short test is selected, because it is the first IC test. The Very High Speed Integrated Circuit Hardware Description Language (VHDL) is used to model the Open/Short Test on IC and the design is capable to perform the open/short test. |
| first_indexed | 2025-11-14T18:09:46Z |
| format | Conference or Workshop Item |
| id | mmu-3190 |
| institution | Multimedia University |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-14T18:09:46Z |
| publishDate | 2007 |
| publisher | World Scientific and Engineering Academy and Society (WSEAS) |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | mmu-31902021-04-22T16:40:53Z http://shdl.mmu.edu.my/3190/ VHDL modelling of the open short tester Pang, Wai Leong Chew, Kok Wai Choong, Florence Chiao Mei Chan, C. L. T Technology (General) QA75.5-76.95 Electronic computers. Computer science IC (Integrated Circuitry) testing requires the very advanced and sophisticated Advance Test Equipment (ATE) that costs multi million USD. The cost of IC testing is increasing yearly and it will exceed the cost of manufacturing in future. The manufacturers are interested to lower down the manufacturing cost. Low cost tester is one of the options to reduce the manufacturing cost. The low cost FPGA realization of Open/Short Test on IC is introduced to reduce the IC test cost. The open short test is selected, because it is the first IC test. The Very High Speed Integrated Circuit Hardware Description Language (VHDL) is used to model the Open/Short Test on IC and the design is capable to perform the open/short test. World Scientific and Engineering Academy and Society (WSEAS) 2007-04 Conference or Workshop Item NonPeerReviewed text en http://shdl.mmu.edu.my/3190/1/VHDL%20modelling%20of%20the%20open%20short%20tester.pdf Pang, Wai Leong and Chew, Kok Wai and Choong, Florence Chiao Mei and Chan, C. L. (2007) VHDL modelling of the open short tester. In: 6th WSEAS International Conference on Instrumentation, Measurement, Circuits and Systems/7th WSEAS International Conference on Robotics, Control and Manufacturing Technology, 15-17 April 2007, Hangzhou, China. https://dl.acm.org/doi/10.5555/1364520.1364527 |
| spellingShingle | T Technology (General) QA75.5-76.95 Electronic computers. Computer science Pang, Wai Leong Chew, Kok Wai Choong, Florence Chiao Mei Chan, C. L. VHDL modelling of the open short tester |
| title | VHDL modelling of the open short tester |
| title_full | VHDL modelling of the open short tester |
| title_fullStr | VHDL modelling of the open short tester |
| title_full_unstemmed | VHDL modelling of the open short tester |
| title_short | VHDL modelling of the open short tester |
| title_sort | vhdl modelling of the open short tester |
| topic | T Technology (General) QA75.5-76.95 Electronic computers. Computer science |
| url | http://shdl.mmu.edu.my/3190/ http://shdl.mmu.edu.my/3190/ http://shdl.mmu.edu.my/3190/1/VHDL%20modelling%20of%20the%20open%20short%20tester.pdf |