Low power ROM Employing Dynamic Threshold-Voltage MOSFET (DTMOS) Technique

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Low power ROM Employing Dynamic Threshold-Voltage MOSFET (DTMOS) Technique

This paper examines the performance of two 128-bit ROM circuits, implemented on Silterra 0.18u CMOS process. The first circuit is built using standard NMOS transistors, runs on 0.9V supply voltage, has gate voltage of 0.45V and consumes 102.07 mu W power. The second circuit is designed partly using...

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Bibliographic Details
Main Authors:	M., Mustapa, F., Mohd-Yasin, M. K., Khaw, M. B. I., Reaz, A., Kordesch
Format:	Conference or Workshop Item
Published:	2008
Subjects:	T Technology (General) QA75.5-76.95 Electronic computers. Computer science
Online Access:	http://shdl.mmu.edu.my/2890/

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