APA (7th ed.) Citation

Senthilpari, C., Diwakar, K., Prabhu, C., & Singh, A. K. (2006). Power Deduction in Digital Signal Processing Circuit using Inventive CPL Subtractor Circuit.

Chicago Style (17th ed.) Citation

Senthilpari, C., K. Diwakar, C.M.R Prabhu, and Ajay Kumar Singh. Power Deduction in Digital Signal Processing Circuit Using Inventive CPL Subtractor Circuit. 2006.

MLA (9th ed.) Citation

Senthilpari, C., et al. Power Deduction in Digital Signal Processing Circuit Using Inventive CPL Subtractor Circuit. 2006.