A study and design of CMOS H-Tree clock distribution network in system-on-chip
A design of a low skew clock distribution network is presented based on the TSMC 0.18 mu m CMOS technology. This work first investigated various aspects in designing a clock distribution network. After that, the design methodology for the chosen H-Tree clock network topology is presented. A series o...
| Main Authors: | , , |
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| Format: | Conference or Workshop Item |
| Published: |
2009
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| Subjects: | |
| Online Access: | http://shdl.mmu.edu.my/1922/ |