Simulation, fabrication and characterization of PMOS transistor device

In a low supply voltage CMOS technology, it is desirable to scale threshold voltage and gate length for improving circuit performance. Therefore, a project has been carried out inside KUiTTHO's microelectronic cleanroom to produce a method that has better l ow power/low voltage current concentr...

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Main Author:	Yusuf , Siti Idzura
Format:	Thesis
Published:	2006
Subjects:	TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://eprints.uthm.edu.my/813/ http://eprints.uthm.edu.my/813/1/24_Pages_from_SIMULATION%2C_FABRICATION_AND_CHARACTERIZATION_OF_PMOS_TRANSISTOR_DEVICE.pdf

id	uthm-813
recordtype	eprints
spelling	uthm-8132011-04-29T06:41:56Z Simulation, fabrication and characterization of PMOS transistor device Yusuf , Siti Idzura TK Electrical engineering. Electronics Nuclear engineering In a low supply voltage CMOS technology, it is desirable to scale threshold voltage and gate length for improving circuit performance. Therefore, a project has been carried out inside KUiTTHO's microelectronic cleanroom to produce a method that has better l ow power/low voltage current concentrate on p-channel (PMOS). An experiment was also done to determine the right parameter value to b e used for fabrication process such as oxidation process thickness rate, sheet resistance and metal thickness. From the parameter value obtained, 0.3 m m and 0.5 mm PMOS transistor had been successfully produced. Fabrication simulation was performed to produce a 0.1 \|am and 0.3p.m PMOS transistor by using the ISE-TCAD software. The trade off between threshold voltage (VTH), gate length (LG) and thin oxide thickness (tox) are discussed to determine the characteristics of the transistors. It shows that for 0.3mm (toX = 860A) PMOS transistor the value of VT H =-3.33V and 0.5 mm ( t ^ = 910A), VT H value =-4.3V. From the simulation result show for 0.1 jim (to* = 200A), VT H = - 0 . 3 1 4V and for 0 . 5 \| im (400A) Vt h = -0.634V. The result shows that, with decreasing gate length and oxide thickness will produce lower value of threshold voltage. Minimum value of threshold voltage can result in a better performance of transistor. Another parameter must be taken into consideration such as leakage current, resistivity and conductivity to get a better design of PMOS transistor in future research. 2006-12-21 Thesis NonPeerReviewed application/pdf http://eprints.uthm.edu.my/813/1/24_Pages_from_SIMULATION%2C_FABRICATION_AND_CHARACTERIZATION_OF_PMOS_TRANSISTOR_DEVICE.pdf Yusuf , Siti Idzura (2006) Simulation, fabrication and characterization of PMOS transistor device. Masters thesis, Kolej Universiti Teknologi Tun Hussein. http://eprints.uthm.edu.my/813/
repository_type	Digital Repository
institution_category	Local University
institution	Universiti Tun Hussein Onn Malaysia
building	UTHM Institutional Repository
collection	Online Access
topic	TK Electrical engineering. Electronics Nuclear engineering
spellingShingle	TK Electrical engineering. Electronics Nuclear engineering Yusuf , Siti Idzura Simulation, fabrication and characterization of PMOS transistor device
description	In a low supply voltage CMOS technology, it is desirable to scale threshold voltage and gate length for improving circuit performance. Therefore, a project has been carried out inside KUiTTHO's microelectronic cleanroom to produce a method that has better l ow power/low voltage current concentrate on p-channel (PMOS). An experiment was also done to determine the right parameter value to b e used for fabrication process such as oxidation process thickness rate, sheet resistance and metal thickness. From the parameter value obtained, 0.3 m m and 0.5 mm PMOS transistor had been successfully produced. Fabrication simulation was performed to produce a 0.1 \|am and 0.3p.m PMOS transistor by using the ISE-TCAD software. The trade off between threshold voltage (VTH), gate length (LG) and thin oxide thickness (tox) are discussed to determine the characteristics of the transistors. It shows that for 0.3mm (toX = 860A) PMOS transistor the value of VT H =-3.33V and 0.5 mm ( t ^ = 910A), VT H value =-4.3V. From the simulation result show for 0.1 jim (to* = 200A), VT H = - 0 . 3 1 4V and for 0 . 5 \| im (400A) Vt h = -0.634V. The result shows that, with decreasing gate length and oxide thickness will produce lower value of threshold voltage. Minimum value of threshold voltage can result in a better performance of transistor. Another parameter must be taken into consideration such as leakage current, resistivity and conductivity to get a better design of PMOS transistor in future research.
format	Thesis
author	Yusuf , Siti Idzura
author_facet	Yusuf , Siti Idzura
author_sort	Yusuf , Siti Idzura
title	Simulation, fabrication and characterization of PMOS transistor device
title_short	Simulation, fabrication and characterization of PMOS transistor device
title_full	Simulation, fabrication and characterization of PMOS transistor device
title_fullStr	Simulation, fabrication and characterization of PMOS transistor device
title_full_unstemmed	Simulation, fabrication and characterization of PMOS transistor device
title_sort	simulation, fabrication and characterization of pmos transistor device
publishDate	2006
url	http://eprints.uthm.edu.my/813/ http://eprints.uthm.edu.my/813/1/24_Pages_from_SIMULATION%2C_FABRICATION_AND_CHARACTERIZATION_OF_PMOS_TRANSISTOR_DEVICE.pdf
first_indexed	2018-09-05T10:45:02Z
last_indexed	2018-09-05T10:45:02Z
_version_	1610764048231563264

Simulation, fabrication and characterization of PMOS transistor device

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