Efficient architectures for 3D HWT using dynamic partial reconfiguration

This paper presents the design and implementation of three dimensional (3D) Haar wavelet transform (HWT) with transpose based computation and dynamic partial reconfiguration (DPR) mechanism on field programmable gate array (FPGA). Due to the separability property of the multi-dimensional HWT, the prop...

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Bibliographic Details
Main Authors: Ahmad , Afandi, Krill, Benjamin, Rabah, Abbes
Format: Article
Published: Elsevier Ltd. 2010
Subjects:
Online Access:http://eprints.uthm.edu.my/3046/