Comparing Simulations and Graphical Representations of Complexities of Benchmark and Large-Variable Circuits

Comparing Simulations and Graphical Representations of Complexities of Benchmark and Large-Variable Circuits

In this work, we analyzes the relationship between randomly generated Boolean function complexity and the number of nodes in benchmark circuits using the Binary Decision Diagrams (BDD). We generated BDDs for several ISCAS benchmark circuits and derived the area complexity measure in terms of number...

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Bibliographic Details
Main Authors: Prasad, P., Beg, A., Singh, Ashutosh Kumar
Other Authors: ICIEE 2010
Format: Conference Paper
Published: IEEE Explorer 2010
Subjects:
Benchmark circuits
Binary Decision diagram
Area Complexity
Online Access:http://hdl.handle.net/20.500.11937/21256

Internet

http://hdl.handle.net/20.500.11937/21256

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