Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing

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Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing

Graphs are pervasive data structures in computer science, and algorithms working with them are fundamental to the field. Many challenging problems in Very Large-Scale Integration (VLSI) physical design automation are modeled using graphs. The routing problems in VLSI physical design are, in essence,...

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Bibliographic Details
Main Author:	Ch'ng, Heng Sun
Format:	Thesis
Language:	English
Published:	2007
Subjects:	TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/6381/ http://eprints.utm.my/6381/1/ChNgHengSunMFKE2007.pdf

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