Accelerating graph algorithms with priority queue processor

QR Code

Accelerating graph algorithms with priority queue processor

Graphs are a pervasive data structure in computer science, and algorithms working with them are fundamental to the field. Of the various graph algorithms, techniques for searching a graph are the heart of graph algorithms. Many graph algorithms are organized as simple elaborations of basic graph se...

Full description

Bibliographic Details
Main Authors:	Heng Sun, Ch'ng, Eik Wee, Chew, Shaikh-Husin, Nasir, Hani, Mohamed Khalil
Format:	Article
Language:	English
Published:	School of Postgraduate Studies, UTM 2006
Subjects:	TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://eprints.utm.my/1689/ http://eprints.utm.my/1689/1/sh-nasir06_Accelerating_graph_algorithm.pdf

Similar Items

Graph processing hardware accelerator for shortest path algorithms in nanometer very large-scale integration interconnect routing
by: Ch'ng, Heng Sun
Published: (2007)

Nano-scale VLSI clock routing module based on useful-skew tree algorithm
by: Eik Wee, Chew, et al.
Published: (2006)

Performance evaluation of a 3-priority based Mixed Priority Queueing (MPQ) policy with application to input and output queueing ATM switch
by: Mohd Ali, Borhanuddin, et al.

An acceleration simulation method for power law priority traffic
by: H. S. Ariffin, Sharifah, et al.
Published: (2008)

Accelerating Cosmologies with Extended Product Spaces
by: Ch’ng, Han Siong
Published: (2006)

Development of an acceleration plethysmogram based cardioid graph biometric identification
by: Sidek, Khairul Azami, et al.
Published: (2016)

Toolchain development and queue system enhanced security coprocessor for FPGA-based internet of things (IoT) processor
by: See, Jin Chuan
Published: (2019)

Queueing Theory Study of Round Robin Versus Priority Dynamic Quantum Time Round Robin Scheduling Algorithms
by: Maysoon, A. Mohammed, et al.
Published: (2015)

Efficient accelerated simulation technique for packet switched networks : a buffer with two priority inputs
by: Ariffin, Sharifah H. S., et al.
Published: (2004)

Design and implementation of a private and public key crypto processor for next-generation it security applications
by: Hani, Mohamed Khalil, et al.
Published: (2006)

Portable electronics queue control system
by: Wong, Chun Yuan
Published: (2012)

Investigation in to ramp queues vs. freeway queues on ramp metered freeways
by: Lim, David Eng Chung
Published: (2010)

Mixed integer programming model for scheduling in unrelated parallel processor system with priority consideration
by: Caccetta, Louis, et al.
Published: (2014)

Power optimization in multi-processor system with frequency scaling and processor affinity
by: Wee, Adrian Siong Min
Published: (2010)

Front desk customer service for queue management system
by: Mohamad Fazli, Alias
Published: (2007)

The Design of an Asynchronous RISC Processor
by: Pee, Yao Hong
Published: (2021)

A simulation study of a new rate-and-queue-based active queue management algorithm
by: Ali Asghar, Jomah Adham, et al.
Published: (2012)

Design of digital signal processor
by: Teo,, Siaw Hui.
Published: (2009)

Queue backlog as a node metric for RPL protocol
by: Abdullah M. A, Awad, et al.
Published: (2016)

Fsm-Based Enhanced March C- Algorithm For Memory Built-In Self-Test
by: CH’NG , MING ZONG
Published: (2017)

Design of 6-Stage Pipeline Processor
by: Teng, Wen Jun
Published: (2021)

Developing extended ISA on RISC based processor
by: Lee, Ang
Published: (2023)

VLSI Design of a neurohardware processor implementing the Kohonen Neural Network algorithm
by: Rajah, Avinash
Published: (2005)

FPGA Implementation of RSA Public-Key Cryptographic Coprocessor
by: Hani, Mohamed Khalil, et al.
Published: (2000)

CHarity and donation tracking system using queue structure
by: Badheyba, Manea Abdullah, et al.
Published: (2023)

Accelerating cosmologies of R4×Rᵐ1×Rᵐ2×Hᵐ3 type
by: Ch’ng, Han Siong, et al.
Published: (2005)

Design and implementation of a simple queueing system for vehicle traffic simulator
by: Sediono, Wahju
Published: (2011)

Review on queueing problem in healthcare
by: Ariff, Hajar, et al.
Published: (2018)

Appointment-Based Queue Management System Using Geolocation Information
by: Tee, Kah Hui
Published: (2017)

Implementation of a soft core processor on a FPGA
by: Woo, Chi Liang
Published: (2011)

3 in 1 processor coconut dehusker machine
by: Ngadiron, Mohamad Faridzuan, et al.
Published: (2017)

USB soft core with altera Nios processor
by: Cheah, Chee Teong
Published: (2007)

Design and simulate RISC-V processor using verilog
by: Ngu, David Teck Joung
Published: (2023)

A Simple Digital Semaphore Decoder Using DSP Processor
by: Syed Abu Bakar, Syed Abdul Rahman, et al.
Published: (2000)

Verilog design of input/output processor with built-in-self-test
by: Goh, Keng Hoo
Published: (2007)

Determination Of Rolling Returns From A Rasterized Graph Using Image Processing
by: Chew, Jia Hao
Published: (2020)

Queue length and waiting time distributions in a system of M dependent queues / Soo Huei Ching
by: Soo, Huei Ching
Published: (2012)

Hybrid scheduling and dual queue scheduling
by: A., Oxley, et al.
Published: (2009)

Hybrid scheduling and dual queue scheduling
by: Mahmood, Ahmad Kamil
Published: (2009)

Hybrid Scheduling and Dual Queue Scheduling
by: Shah, S.N.M., et al.
Published: (2009)