FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation

External devices such as modems and other computers need to communicate serially. In order to provide this communication, a universal asynchronous receiver�transmitter (UARn can provide an asynchronous serial data communication with I/O outputs devices such as keyboard, mouse or keypad. It can t...

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Main Author: Ahmad, Nabihah @ Nornabihah
Format: Thesis
Language:English
English
English
Published: 2005
Subjects:
Online Access:http://eprints.uthm.edu.my/7699/
http://eprints.uthm.edu.my/7699/1/24p%20NABIHAH%20%40%20NORNABIHAH%20AHMAD.pdf
http://eprints.uthm.edu.my/7699/2/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20COPYRIGHT%20DECLARATION.pdf
http://eprints.uthm.edu.my/7699/3/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20WATERMARK.pdf
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author Ahmad, Nabihah @ Nornabihah
author_facet Ahmad, Nabihah @ Nornabihah
author_sort Ahmad, Nabihah @ Nornabihah
building UTHM Institutional Repository
collection Online Access
description External devices such as modems and other computers need to communicate serially. In order to provide this communication, a universal asynchronous receiver�transmitter (UARn can provide an asynchronous serial data communication with I/O outputs devices such as keyboard, mouse or keypad. It can transmit serial data on over it's transmit line (TxD) and receive serial data over it's receive line (RxD). This project describes a universal asynchronous receiver-transmitter (UART) design. It is design from Very High Speed Integrated Circuit Hardware Description Language (VHDL) description, and then to Field Programmable Gate Array (FPGA) implementation. VHDL is used to provide a simple way of design entry through behavioral description. This project covers VHDL integration issue involved in the flow from high-level description to a fully simulated and synthesized. FPGA University Program Educational Board (UP2) is used to achieve fast prototype build and logic circuit verification. Then analysis the features of other existing UART technology design.
first_indexed 2025-11-15T20:22:05Z
format Thesis
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institution Universiti Tun Hussein Onn Malaysia
institution_category Local University
language English
English
English
last_indexed 2025-11-15T20:22:05Z
publishDate 2005
recordtype eprints
repository_type Digital Repository
spelling uthm-76992022-09-19T02:07:57Z http://eprints.uthm.edu.my/7699/ FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation Ahmad, Nabihah @ Nornabihah TK Electrical engineering. Electronics Nuclear engineering TK7800-8360 Electronics External devices such as modems and other computers need to communicate serially. In order to provide this communication, a universal asynchronous receiver�transmitter (UARn can provide an asynchronous serial data communication with I/O outputs devices such as keyboard, mouse or keypad. It can transmit serial data on over it's transmit line (TxD) and receive serial data over it's receive line (RxD). This project describes a universal asynchronous receiver-transmitter (UART) design. It is design from Very High Speed Integrated Circuit Hardware Description Language (VHDL) description, and then to Field Programmable Gate Array (FPGA) implementation. VHDL is used to provide a simple way of design entry through behavioral description. This project covers VHDL integration issue involved in the flow from high-level description to a fully simulated and synthesized. FPGA University Program Educational Board (UP2) is used to achieve fast prototype build and logic circuit verification. Then analysis the features of other existing UART technology design. 2005-11 Thesis NonPeerReviewed text en http://eprints.uthm.edu.my/7699/1/24p%20NABIHAH%20%40%20NORNABIHAH%20AHMAD.pdf text en http://eprints.uthm.edu.my/7699/2/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20COPYRIGHT%20DECLARATION.pdf text en http://eprints.uthm.edu.my/7699/3/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20WATERMARK.pdf Ahmad, Nabihah @ Nornabihah (2005) FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation. Masters thesis, Kolej Universiti Teknologi Tun Hussein Onn.
spellingShingle TK Electrical engineering. Electronics Nuclear engineering
TK7800-8360 Electronics
Ahmad, Nabihah @ Nornabihah
FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
title FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
title_full FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
title_fullStr FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
title_full_unstemmed FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
title_short FPGA prototyping of universal asynchronous receiver-transmitter (UART) using altera VHDL implementation
title_sort fpga prototyping of universal asynchronous receiver-transmitter (uart) using altera vhdl implementation
topic TK Electrical engineering. Electronics Nuclear engineering
TK7800-8360 Electronics
url http://eprints.uthm.edu.my/7699/
http://eprints.uthm.edu.my/7699/1/24p%20NABIHAH%20%40%20NORNABIHAH%20AHMAD.pdf
http://eprints.uthm.edu.my/7699/2/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20COPYRIGHT%20DECLARATION.pdf
http://eprints.uthm.edu.my/7699/3/NABIHAH%20%40%20NORNABIHAH%20AHMAD%20WATERMARK.pdf