VLSI implementation of full adder-subtractor design

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VLSI implementation of full adder-subtractor design

Low power consumption and high performance in Very Large Scale Integration (VLSI) design are the major concerns in order to develop an efficient electronic devices. Addition is commonly used arithmetic operation in most electronic system which requires high performance and low power consumption of f...

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Bibliographic Details
Main Authors:	Ahmad, Nabihah, Lim, Yoong Kang
Format:	Article
Language:	English
Published:	Medwell Publications 2017
Subjects:	TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://eprints.uthm.edu.my/5196/ http://eprints.uthm.edu.my/5196/1/AJ%202017%20%28329%29%20VLSI%20implementation%20of%20full%20adder-subtractor%20design.pdf

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