Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device

In this study, Taguchi method was used to optimize the influence of process parameter variations on threshold voltage (VTH) in 45 nm n-channel metal oxide semiconductor (NMOS) device. The orthogonal array, the signal-to-noise ratio, and analysis of variance were employed to study the performance cha...

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Main Author: Fauziyah , Salehuddin
Format: Article
Language:English
Published: Academic Journals Inc.. 2011
Subjects:
Online Access:http://eprints.utem.edu.my/id/eprint/3798/
http://eprints.utem.edu.my/id/eprint/3798/3/%28J7%29_IJPS_6%2830%29_7026-7034.pdf
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author Fauziyah , Salehuddin
author_facet Fauziyah , Salehuddin
author_sort Fauziyah , Salehuddin
building UTeM Institutional Repository
collection Online Access
description In this study, Taguchi method was used to optimize the influence of process parameter variations on threshold voltage (VTH) in 45 nm n-channel metal oxide semiconductor (NMOS) device. The orthogonal array, the signal-to-noise ratio, and analysis of variance were employed to study the performance characteristics of a device. In this paper, eleven process parameters (control factors) were varied for 2 levels to perform 12 experiments. Whereas, the two noise factors were varied for 2 levels to get four readings of VTH for every row of experiment. VTH results were used as the evaluation variable. This work was done using technology computer-aided design (TCAD) simulator, consisting of a process simulator, ATHENA and device simulator, ATLAS. These two simulators were combined with Taguchi method to aid in design and optimize the process parameters. In this research, compensation implantation energy was identified as one of the process parameters that have the strongest effect on the response characteristics. While the halo implantation dosage was identified as an adjustment factor to get the nominal values of threshold voltage for NMOS device equal to 0.176 V.
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spelling utem-37982021-11-25T12:22:05Z http://eprints.utem.edu.my/id/eprint/3798/ Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device Fauziyah , Salehuddin TA Engineering (General). Civil engineering (General) QC Physics In this study, Taguchi method was used to optimize the influence of process parameter variations on threshold voltage (VTH) in 45 nm n-channel metal oxide semiconductor (NMOS) device. The orthogonal array, the signal-to-noise ratio, and analysis of variance were employed to study the performance characteristics of a device. In this paper, eleven process parameters (control factors) were varied for 2 levels to perform 12 experiments. Whereas, the two noise factors were varied for 2 levels to get four readings of VTH for every row of experiment. VTH results were used as the evaluation variable. This work was done using technology computer-aided design (TCAD) simulator, consisting of a process simulator, ATHENA and device simulator, ATLAS. These two simulators were combined with Taguchi method to aid in design and optimize the process parameters. In this research, compensation implantation energy was identified as one of the process parameters that have the strongest effect on the response characteristics. While the halo implantation dosage was identified as an adjustment factor to get the nominal values of threshold voltage for NMOS device equal to 0.176 V. Academic Journals Inc.. 2011-11-23 Article PeerReviewed application/pdf en http://eprints.utem.edu.my/id/eprint/3798/3/%28J7%29_IJPS_6%2830%29_7026-7034.pdf Fauziyah , Salehuddin (2011) Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device. International Journal of Physical Sciences, 6 (30). pp. 7026-7034. ISSN 1992-1950 http://www.academicjournals.org/IJPS/ 10.5897/IJPS11.401
spellingShingle TA Engineering (General). Civil engineering (General)
QC Physics
Fauziyah , Salehuddin
Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device
title Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device
title_full Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device
title_fullStr Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device
title_full_unstemmed Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device
title_short Optimization of input process parameters variation on threshold voltage in 45 nm NMOS device
title_sort optimization of input process parameters variation on threshold voltage in 45 nm nmos device
topic TA Engineering (General). Civil engineering (General)
QC Physics
url http://eprints.utem.edu.my/id/eprint/3798/
http://eprints.utem.edu.my/id/eprint/3798/
http://eprints.utem.edu.my/id/eprint/3798/
http://eprints.utem.edu.my/id/eprint/3798/3/%28J7%29_IJPS_6%2830%29_7026-7034.pdf