Cost-Efficient Fault-Tolerant Decoder for Hybrid Nanoelectronic Memories

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Cost-Efficient Fault-Tolerant Decoder for Hybrid Nanoelectronic Memories

Existing work on fault tolerance in hybrid nanoelectronic memories (hybrid memories) assumes that faults only occur in the memory array and the encoder, not in the decoder. However, as the decoder is structured using scaled CMOS devices, it is also becoming vulnerable to faults. This paper present...

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Bibliographic Details
Main Authors:	Haron, Nor Zaidi, Hamdioui, Said
Format:	Conference or Workshop Item
Language:	English
Published:	2011
Subjects:	TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://eprints.utem.edu.my/id/eprint/3759/ http://eprints.utem.edu.my/id/eprint/3759/1/NZBHaron_DATE11.pdf

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