Power management scheme for FPGA based customizable internet of thing (IOT) sensor nodes
Field-programmable gate array (FPGA)-based sensor nodes are popular for their flexible design approach and field re-configurability. RISC32, one of the recent Internet of things (IoT) processors proposed for developing FPGAbased sensor nodes, has the ability to reconfigure the microarchitecture d...
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| Format: | Final Year Project / Dissertation / Thesis |
| Published: |
2022
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| Subjects: | |
| Online Access: | http://eprints.utar.edu.my/6356/ http://eprints.utar.edu.my/6356/1/CEA_2022_TBL_%2D_1706813.pdf |
| _version_ | 1848886655521390592 |
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| author | Tan, Beng Liong |
| author_facet | Tan, Beng Liong |
| author_sort | Tan, Beng Liong |
| building | UTAR Institutional Repository |
| collection | Online Access |
| description | Field-programmable gate array (FPGA)-based sensor nodes are popular for
their flexible design approach and field re-configurability. RISC32, one of the
recent Internet of things (IoT) processors proposed for developing FPGAbased sensor nodes, has the ability to reconfigure the microarchitecture
dynamically according to program workload. This helps in reducing the
dynamic energy consumption required for completing program execution.
However, such an approach does not minimize the static energy consumption,
which is important in FPGA-based systems. In this study, two known lowpower techniques compatible with FGPA were implemented in RISC32: clock
gating (CG) and dynamic voltage–frequency scaling (DVFS) techniques. In
addition, a software tool (Energy Reduction Program Analyzer) was
developed to estimate the parameters that can configure the sensor node to
achieve minimum energy consumption, targeting the typical IoT application
scenario. Experimental results show that the low-power techniques applied in
this work can reduce the energy consumption by 47% compared to the original
RISC32. In particular, combining low-power techniques has shown improved
iii
energy saving compared to single low-power technique: 45% improvement
versus CG, 11.54% improvement versus DVFS, and 40% improvement versus
partial reconfiguration. |
| first_indexed | 2025-11-15T19:41:57Z |
| format | Final Year Project / Dissertation / Thesis |
| id | utar-6356 |
| institution | Universiti Tunku Abdul Rahman |
| institution_category | Local University |
| last_indexed | 2025-11-15T19:41:57Z |
| publishDate | 2022 |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | utar-63562024-05-23T10:29:14Z Power management scheme for FPGA based customizable internet of thing (IOT) sensor nodes Tan, Beng Liong T Technology (General) TD Environmental technology. Sanitary engineering TH Building construction Field-programmable gate array (FPGA)-based sensor nodes are popular for their flexible design approach and field re-configurability. RISC32, one of the recent Internet of things (IoT) processors proposed for developing FPGAbased sensor nodes, has the ability to reconfigure the microarchitecture dynamically according to program workload. This helps in reducing the dynamic energy consumption required for completing program execution. However, such an approach does not minimize the static energy consumption, which is important in FPGA-based systems. In this study, two known lowpower techniques compatible with FGPA were implemented in RISC32: clock gating (CG) and dynamic voltage–frequency scaling (DVFS) techniques. In addition, a software tool (Energy Reduction Program Analyzer) was developed to estimate the parameters that can configure the sensor node to achieve minimum energy consumption, targeting the typical IoT application scenario. Experimental results show that the low-power techniques applied in this work can reduce the energy consumption by 47% compared to the original RISC32. In particular, combining low-power techniques has shown improved iii energy saving compared to single low-power technique: 45% improvement versus CG, 11.54% improvement versus DVFS, and 40% improvement versus partial reconfiguration. 2022-03 Final Year Project / Dissertation / Thesis NonPeerReviewed application/pdf http://eprints.utar.edu.my/6356/1/CEA_2022_TBL_%2D_1706813.pdf Tan, Beng Liong (2022) Power management scheme for FPGA based customizable internet of thing (IOT) sensor nodes. Master dissertation/thesis, UTAR. http://eprints.utar.edu.my/6356/ |
| spellingShingle | T Technology (General) TD Environmental technology. Sanitary engineering TH Building construction Tan, Beng Liong Power management scheme for FPGA based customizable internet of thing (IOT) sensor nodes |
| title | Power management scheme for FPGA based customizable
internet of thing (IOT) sensor nodes
|
| title_full | Power management scheme for FPGA based customizable
internet of thing (IOT) sensor nodes
|
| title_fullStr | Power management scheme for FPGA based customizable
internet of thing (IOT) sensor nodes
|
| title_full_unstemmed | Power management scheme for FPGA based customizable
internet of thing (IOT) sensor nodes
|
| title_short | Power management scheme for FPGA based customizable
internet of thing (IOT) sensor nodes
|
| title_sort | power management scheme for fpga based customizable
internet of thing (iot) sensor nodes |
| topic | T Technology (General) TD Environmental technology. Sanitary engineering TH Building construction |
| url | http://eprints.utar.edu.my/6356/ http://eprints.utar.edu.my/6356/1/CEA_2022_TBL_%2D_1706813.pdf |