Wafer map defect pattern classification using deep learning model - Lim, Yu Pin (2023)
Wafer maps are generated during wafer testing in the semiconductor manufacturing process. They contain valuable information that helps engineers identify faults in the fabrication process. Classification of defect patterns is necessary to identify the root cause of die failures, and deep learning models have shown promising results in this regard. However, traditional CNN models have limited ability to handle the varied distribution of defect patterns in different wafer maps. The absence of balanced wafer map defect patterns dataset also posed a challenge to the training of CNNs. In this research, a novel approach that combines Connected-Component Labelling (CCL) for noise reduction, Convolutional Autoencoders (CAE) for data augmentation to address dataset class imbalance issue, and transfer learning via the EfficientNet model for an end-to-end system capable of accurately classifying wafer map defect patterns has been proposed. Experimental results showed that the proposed model demonstrates robust performance in terms of accuracy, precision, recall and F1-Score, which confirmed its effectiveness in classifying wafer map defect patterns.