Front end design (logic synthesis) of Risc-V processor using design compiler

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Front end design (logic synthesis) of Risc-V processor using design compiler

Modern microprocessors depend on Design Compiler's logic synthesis of RISC-V processor Front-Ends. This study examines the synthesis process for a 14nm, 32nm, or 90nm RISC-V processor at clock periods from 0 to 5 nanoseconds. The analysis begins with design constraints, including clock frequenc...

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Bibliographic Details
Main Author:	Koay, Yenn Nee
Format:	Final Year Project / Dissertation / Thesis
Published:	2023
Subjects:	T Technology (General) TK Electrical engineering. Electronics Nuclear engineering
Online Access:	http://eprints.utar.edu.my/5964/ http://eprints.utar.edu.my/5964/1/Koay_Yenn_Nee_21AGM06716.pdf

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