Back End Design (Automatic Place and Route) of RISC-V Processor using IC Compiler
This research paper focuses on the development of an Automatic Place and Route (APR) methodology for the RISC-V processor design using the IC Compiler tool. The proposed methodology is aimed at achieving good Quality of Results (QoR) for different technology nodes, including 32nm and 90nm. The paper...
| Main Author: | Loh, Jing En |
|---|---|
| Format: | Final Year Project / Dissertation / Thesis |
| Published: |
2023
|
| Subjects: | |
| Online Access: | http://eprints.utar.edu.my/5959/ http://eprints.utar.edu.my/5959/1/Loh_Jing_En_21AGM06712.pdf |
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