Studies to improve the process of Decoding Rateless Erasure Code with Highly-Parallel GPU Architecture

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Studies to improve the process of Decoding Rateless Erasure Code with Highly-Parallel GPU Architecture

Bibliographic Details
Main Author:	Chong, Sin Ran
Format:	Final Year Project / Dissertation / Thesis
Published:	2018
Online Access:	http://eprints.utar.edu.my/2954/ http://eprints.utar.edu.my/2954/1/ESA%2D2018%2D1600306%2D1.pdf

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