Analysis Of Plastic Encapsulation Process In 3D IC Package With Through-Silicon Via (Tsv) Technology

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Analysis Of Plastic Encapsulation Process In 3D IC Package With Through-Silicon Via (Tsv) Technology

Through-silicon via (TSV) technology has been an emerging technology to 3D heterogeneous system integration through vertical interconnection. This promising technology enables smaller footprints, reduced signal delay, shorter interconnections, lower power consumption and higher integration densit...

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Bibliographic Details
Main Author:	Ong, Ern Seang
Format:	Thesis
Language:	English
Published:	2013
Subjects:	TK1-9971 Electrical engineering. Electronics. Nuclear engineering
Online Access:	http://eprints.usm.my/61078/ http://eprints.usm.my/61078/1/24%20Pages%20from%20Pages%20from%2000001780128.pdf

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