Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA - Abd Razak, Mohd Pasha (Universiti Sains Malaysia, 2006)
The purpose of this project is to design a prototype of an eight bits input output device based on FPGA. The input output device will have the same function as mode 0 of the 8255 input output chip that is already in the market today. The prototype contain three eight bits accessible ports ( port A, B and C ). Each port can be programmed to write or read data depends on the control words given to the device. The eight bits input output device can be interface with the 8051 microcontroller to increase the number of input and output port capability of the microcontroller. In this project, FPGA and VHDL code are used to design the prototype. XC4010XLPC84 is used as a demo board. It is one of the FPGA in XC4000XL series and produce by xilinx. The main reason of using xilinx FPGA is because it can significantly reduces cost and time of circuit design process. VHDL code is used to define the behavior of FPGA. Behavioral description technique is used to write the VHDL code for each macro. The circuit that had been design are tested by using microcontroller board. Testing process is important to determine the functionality of the circuit. In this design, 11% CLBs and 58% IOBs had been used from the FPGA. There are redundant CLBs and IOBs that can be used to improve the circuit in the future. The maximum delay for the entire device is 41.596 ns. The result of this project is a device that can be use to read or write, 8 bits of data from the 8051 microcontroller.