Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA
The purpose of this project is to design a prototype of an eight bits input output device based on FPGA. The input output device will have the same function as mode 0 of the 8255 input output chip that is already in the market today. The prototype contain three eight bits accessible ports ( por...
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| Format: | Monograph |
| Language: | English |
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Universiti Sains Malaysia
2006
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| Online Access: | http://eprints.usm.my/58791/ http://eprints.usm.my/58791/1/Peranti%20Masukan%20Dan%20Keluaran%208%20Bit%20Dengan%20Menggunakan%20FPGA_Mohd%20Pasha%20Abd%20Razak.pdf |
| _version_ | 1848883994523860992 |
|---|---|
| author | Abd Razak, Mohd Pasha |
| author_facet | Abd Razak, Mohd Pasha |
| author_sort | Abd Razak, Mohd Pasha |
| building | USM Institutional Repository |
| collection | Online Access |
| description | The purpose of this project is to design a prototype of an eight bits input output device
based on FPGA. The input output device will have the same function as mode 0 of the
8255 input output chip that is already in the market today. The prototype contain three
eight bits accessible ports ( port A, B and C ). Each port can be programmed to write or
read data depends on the control words given to the device. The eight bits input output
device can be interface with the 8051 microcontroller to increase the number of input and
output port capability of the microcontroller. In this project, FPGA and VHDL code are
used to design the prototype. XC4010XLPC84 is used as a demo board. It is one of the
FPGA in XC4000XL series and produce by xilinx. The main reason of using xilinx FPGA
is because it can significantly reduces cost and time of circuit design process. VHDL code
is used to define the behavior of FPGA. Behavioral description technique is used to write
the VHDL code for each macro. The circuit that had been design are tested by using
microcontroller board. Testing process is important to determine the functionality of the
circuit. In this design, 11% CLBs and 58% IOBs had been used from the FPGA. There are
redundant CLBs and IOBs that can be used to improve the circuit in the future. The
maximum delay for the entire device is 41.596 ns. The result of this project is a device that
can be use to read or write, 8 bits of data from the 8051 microcontroller. |
| first_indexed | 2025-11-15T18:59:39Z |
| format | Monograph |
| id | usm-58791 |
| institution | Universiti Sains Malaysia |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-15T18:59:39Z |
| publishDate | 2006 |
| publisher | Universiti Sains Malaysia |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | usm-587912023-06-12T07:48:03Z http://eprints.usm.my/58791/ Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA Abd Razak, Mohd Pasha T Technology TK Electrical Engineering. Electronics. Nuclear Engineering The purpose of this project is to design a prototype of an eight bits input output device based on FPGA. The input output device will have the same function as mode 0 of the 8255 input output chip that is already in the market today. The prototype contain three eight bits accessible ports ( port A, B and C ). Each port can be programmed to write or read data depends on the control words given to the device. The eight bits input output device can be interface with the 8051 microcontroller to increase the number of input and output port capability of the microcontroller. In this project, FPGA and VHDL code are used to design the prototype. XC4010XLPC84 is used as a demo board. It is one of the FPGA in XC4000XL series and produce by xilinx. The main reason of using xilinx FPGA is because it can significantly reduces cost and time of circuit design process. VHDL code is used to define the behavior of FPGA. Behavioral description technique is used to write the VHDL code for each macro. The circuit that had been design are tested by using microcontroller board. Testing process is important to determine the functionality of the circuit. In this design, 11% CLBs and 58% IOBs had been used from the FPGA. There are redundant CLBs and IOBs that can be used to improve the circuit in the future. The maximum delay for the entire device is 41.596 ns. The result of this project is a device that can be use to read or write, 8 bits of data from the 8051 microcontroller. Universiti Sains Malaysia 2006-05-01 Monograph NonPeerReviewed application/pdf en http://eprints.usm.my/58791/1/Peranti%20Masukan%20Dan%20Keluaran%208%20Bit%20Dengan%20Menggunakan%20FPGA_Mohd%20Pasha%20Abd%20Razak.pdf Abd Razak, Mohd Pasha (2006) Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA. Project Report. Universiti Sains Malaysia, Pusat Pengajian Kejuruteraan Elektrik dan Elektronik. (Submitted) |
| spellingShingle | T Technology TK Electrical Engineering. Electronics. Nuclear Engineering Abd Razak, Mohd Pasha Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA |
| title | Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA |
| title_full | Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA |
| title_fullStr | Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA |
| title_full_unstemmed | Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA |
| title_short | Peranti Masukan Dan Keluaran 8 Bit Dengan Menggunakan FPGA |
| title_sort | peranti masukan dan keluaran 8 bit dengan menggunakan fpga |
| topic | T Technology TK Electrical Engineering. Electronics. Nuclear Engineering |
| url | http://eprints.usm.my/58791/ http://eprints.usm.my/58791/1/Peranti%20Masukan%20Dan%20Keluaran%208%20Bit%20Dengan%20Menggunakan%20FPGA_Mohd%20Pasha%20Abd%20Razak.pdf |