Nanoindentation Of Copper Thin Film On Silicon Substrates - Zalkapli, Muhammad Amir (Universiti Sains Malaysia, 2022)
In this day, metallization has shifted to copper because of its high electrical and thermal conductivity, greater melting temperature, and lower rate of diffusivity compared to other metals. In this study, nanoindentation method is used to examine the mechanical characteristics of thin copper film with nanometer-scale indentation depths. The characteristics is investigated by two approach which is experimental and simulation analysis. Two types of copper film which are copper PCB and pure copper are tested in the laboratory. Each sample comes with different thickness and been tested at 10 points with same indentation parameter. The experimental results showed that the hardness of copper PCB is higher than the pure copper. The Young’s modulus value gives different trend as the copper PCB has lower value than the pure copper. This result is varied because the penetration depth and the type of layer for both sample is different. Three-dimensional molecular dynamic (MD) simulation is also being used to examine the nanoindentation of copper thin layer on silicon substrate. Lennard–Jones (LJ) potential is used to simulate the film/substrate system by describing the interaction at the film–substrate interface. The simulation is examined at few different thicknesses of the modelling samples by using the Large-Scale Atomic/Molecular Massively Parallel Simulator (LAMMPS). The Open Visualization Tool (OVITO) is used to generate the three-dimensional representation of the simulation. The results measured showed that the lower thickness will give greater hardness of the copper thin film. The silicon substrate will produced a small affect at the loading force when the sample is penetrated. Several plausible explanations for the depth dependence of hardness qualities at nano-scale indentation depths are offered and discussed.