Automated Tool To Generate Global Clock Distribution For Spine Structure

Clock is a signal which synchronizes the logic as well as register read/write activities of a synchronous circuitry. Therefore a good way to design a reliable clock distributor network is always the top priority in IC design. Clock spine is well known for the robustness in clock signal quality deliv...

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Main Author: Tan , Chun Meng
Format: Thesis
Language:English
Published: 2014
Subjects:
Online Access:http://eprints.usm.my/40973/
http://eprints.usm.my/40973/1/Tan_Chun_Meng_24_pages.pdf
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author Tan , Chun Meng
author_facet Tan , Chun Meng
author_sort Tan , Chun Meng
building USM Institutional Repository
collection Online Access
description Clock is a signal which synchronizes the logic as well as register read/write activities of a synchronous circuitry. Therefore a good way to design a reliable clock distributor network is always the top priority in IC design. Clock spine is well known for the robustness in clock signal quality delivered. Spine structure had shown good performance in terms of skew, jitter and OCV. Thus this scheme is popular for the high speed circuitry such as CPU chipset design. However, the clock spine is not commonly employed in SoC, due to the design as well as the validation complexity of this scheme. Many SoC design toolsets do not support this scheme up until now. So in this thesis, an automated methodology will be introduced and proven to integrate clock spine into a SoC to distribute a high frequency clock signal. These include the know-how and automation of the methodologies to minimize the complexity of designing the clock spine.
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format Thesis
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institution Universiti Sains Malaysia
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language English
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publishDate 2014
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spelling usm-409732018-07-11T02:36:36Z http://eprints.usm.my/40973/ Automated Tool To Generate Global Clock Distribution For Spine Structure Tan , Chun Meng TK7800-8360 Electronics Clock is a signal which synchronizes the logic as well as register read/write activities of a synchronous circuitry. Therefore a good way to design a reliable clock distributor network is always the top priority in IC design. Clock spine is well known for the robustness in clock signal quality delivered. Spine structure had shown good performance in terms of skew, jitter and OCV. Thus this scheme is popular for the high speed circuitry such as CPU chipset design. However, the clock spine is not commonly employed in SoC, due to the design as well as the validation complexity of this scheme. Many SoC design toolsets do not support this scheme up until now. So in this thesis, an automated methodology will be introduced and proven to integrate clock spine into a SoC to distribute a high frequency clock signal. These include the know-how and automation of the methodologies to minimize the complexity of designing the clock spine. 2014 Thesis NonPeerReviewed application/pdf en http://eprints.usm.my/40973/1/Tan_Chun_Meng_24_pages.pdf Tan , Chun Meng (2014) Automated Tool To Generate Global Clock Distribution For Spine Structure. Masters thesis, Universiti Sains Malaysia.
spellingShingle TK7800-8360 Electronics
Tan , Chun Meng
Automated Tool To Generate Global Clock Distribution For Spine Structure
title Automated Tool To Generate Global Clock Distribution For Spine Structure
title_full Automated Tool To Generate Global Clock Distribution For Spine Structure
title_fullStr Automated Tool To Generate Global Clock Distribution For Spine Structure
title_full_unstemmed Automated Tool To Generate Global Clock Distribution For Spine Structure
title_short Automated Tool To Generate Global Clock Distribution For Spine Structure
title_sort automated tool to generate global clock distribution for spine structure
topic TK7800-8360 Electronics
url http://eprints.usm.my/40973/
http://eprints.usm.my/40973/1/Tan_Chun_Meng_24_pages.pdf