Brief: fabrication processes of silicon-on-insulator and Lateral bipolar transistors - S Hamad, Osama; Sidek, Othman; Rehman, Mahfoozur; Ibrahim, Kamarulazizi; H.Mourad, Magdy (2008)

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Silicon on Insulator (SOI) has long been the forerunner of the CMOS technology in the last decade offering superior CMOS with higher speed, higher density, and excellent radiation hardness and reduced second order effects for submicron VLSI applications. The traditional SOI structure consists of a silicon dioxide layer sandwiched between a top thin silicon layer in which devices are built and the silicon substrate. Silicon-On-Insulator materials differ from normal bulk in that an insulating layer is present underneath the active device layer. The formation of a device quality single crystal silicon layer on top of the insulator is not a simple task. Over the years, various methods have been developed and they are briefly described in this paper. However, the purpose of this paper is to review the fabrication process of bipolar junction transistors (BJT) on thin film Silicon on Insulator (TFSOI) wafer. As results, it can be concluded that fabricating, the base, emitter and collector regions of bipolar transistors will be accessible at the top surface of thin film silicon on insulator substrate. Additionally, fabrication bipolar junction transistors by using planar process easier to be made inside laboratory’s school of physics USM.