Brief: fabrication processes of silicon-on-insulator and Lateral bipolar transistors
Silicon on Insulator (SOI) has long been the forerunner of the CMOS technology in the last decade offering superior CMOS with higher speed, higher density, and excellent radiation hardness and reduced second order effects for submicron VLSI applications. The traditional SOI structure consists of...
| Main Authors: | , , , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
2008
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| Subjects: | |
| Online Access: | http://eprints.usm.my/34464/ http://eprints.usm.my/34464/1/HBP20.pdf |
| _version_ | 1848877349572968448 |
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| author | S Hamad, Osama Sidek, Othman Rehman, Mahfoozur Ibrahim, Kamarulazizi H.Mourad, Magdy |
| author_facet | S Hamad, Osama Sidek, Othman Rehman, Mahfoozur Ibrahim, Kamarulazizi H.Mourad, Magdy |
| author_sort | S Hamad, Osama |
| building | USM Institutional Repository |
| collection | Online Access |
| description | Silicon on Insulator (SOI) has long been the forerunner of the CMOS technology in
the last decade offering superior CMOS with higher speed, higher density, and excellent
radiation hardness and reduced second order effects for submicron VLSI applications. The
traditional SOI structure consists of a silicon dioxide layer sandwiched between a top thin silicon
layer in which devices are built and the silicon substrate. Silicon-On-Insulator materials differ
from normal bulk in that an insulating layer is present underneath the active device layer. The
formation of a device quality single crystal silicon layer on top of the insulator is not a simple
task. Over the years, various methods have been developed and they are briefly described in
this paper. However, the purpose of this paper is to review the fabrication process of bipolar
junction transistors (BJT) on thin film Silicon on Insulator (TFSOI) wafer. As results, it can be
concluded that fabricating, the base, emitter and collector regions of bipolar transistors will be
accessible at the top surface of thin film silicon on insulator substrate. Additionally, fabrication
bipolar junction transistors by using planar process easier to be made inside laboratory’s school
of physics USM. |
| first_indexed | 2025-11-15T17:14:02Z |
| format | Conference or Workshop Item |
| id | usm-34464 |
| institution | Universiti Sains Malaysia |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-15T17:14:02Z |
| publishDate | 2008 |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | usm-344642017-05-23T00:24:33Z http://eprints.usm.my/34464/ Brief: fabrication processes of silicon-on-insulator and Lateral bipolar transistors S Hamad, Osama Sidek, Othman Rehman, Mahfoozur Ibrahim, Kamarulazizi H.Mourad, Magdy TH1-9745 Building construction Silicon on Insulator (SOI) has long been the forerunner of the CMOS technology in the last decade offering superior CMOS with higher speed, higher density, and excellent radiation hardness and reduced second order effects for submicron VLSI applications. The traditional SOI structure consists of a silicon dioxide layer sandwiched between a top thin silicon layer in which devices are built and the silicon substrate. Silicon-On-Insulator materials differ from normal bulk in that an insulating layer is present underneath the active device layer. The formation of a device quality single crystal silicon layer on top of the insulator is not a simple task. Over the years, various methods have been developed and they are briefly described in this paper. However, the purpose of this paper is to review the fabrication process of bipolar junction transistors (BJT) on thin film Silicon on Insulator (TFSOI) wafer. As results, it can be concluded that fabricating, the base, emitter and collector regions of bipolar transistors will be accessible at the top surface of thin film silicon on insulator substrate. Additionally, fabrication bipolar junction transistors by using planar process easier to be made inside laboratory’s school of physics USM. 2008-12 Conference or Workshop Item PeerReviewed application/pdf en http://eprints.usm.my/34464/1/HBP20.pdf S Hamad, Osama and Sidek, Othman and Rehman, Mahfoozur and Ibrahim, Kamarulazizi and H.Mourad, Magdy (2008) Brief: fabrication processes of silicon-on-insulator and Lateral bipolar transistors. In: 2nd International Conference on Built Environment in Developing Countries., 3rd- 4th December 2008, Universiti Sains Malaysia, Pulau Pinang. |
| spellingShingle | TH1-9745 Building construction S Hamad, Osama Sidek, Othman Rehman, Mahfoozur Ibrahim, Kamarulazizi H.Mourad, Magdy Brief: fabrication processes of silicon-on-insulator and Lateral bipolar transistors |
| title | Brief: fabrication processes of silicon-on-insulator and
Lateral bipolar transistors
|
| title_full | Brief: fabrication processes of silicon-on-insulator and
Lateral bipolar transistors
|
| title_fullStr | Brief: fabrication processes of silicon-on-insulator and
Lateral bipolar transistors
|
| title_full_unstemmed | Brief: fabrication processes of silicon-on-insulator and
Lateral bipolar transistors
|
| title_short | Brief: fabrication processes of silicon-on-insulator and
Lateral bipolar transistors
|
| title_sort | brief: fabrication processes of silicon-on-insulator and
lateral bipolar transistors |
| topic | TH1-9745 Building construction |
| url | http://eprints.usm.my/34464/ http://eprints.usm.my/34464/1/HBP20.pdf |