Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip
In the presence of deep submicron noise, providing reliable and energy-efficient network on-chip operation is becoming a challenging objective. In this study, the authors propose a hybrid automatic repeat request (HARQ)-based coding scheme that simultaneously reduces the crosstalk induced bus delay...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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Institution of Engineering and Technology
2019
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| Online Access: | http://psasir.upm.edu.my/id/eprint/81436/ http://psasir.upm.edu.my/id/eprint/81436/1/Multi-bit%20error%20control%20coding%20with%20limited%20correction%20for%20high-performance%20and%20energy-%20efficient%20network%20on%20chip.pdf |
| _version_ | 1848859103504367616 |
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| author | Flayyih, Wameedh N. Samsudin, Khairulmizam Hashim, Shaiful J. Ismail, Yehea Rokhani, Fakhrul Zaman |
| author_facet | Flayyih, Wameedh N. Samsudin, Khairulmizam Hashim, Shaiful J. Ismail, Yehea Rokhani, Fakhrul Zaman |
| author_sort | Flayyih, Wameedh N. |
| building | UPM Institutional Repository |
| collection | Online Access |
| description | In the presence of deep submicron noise, providing reliable and energy-efficient network on-chip operation is becoming a challenging objective. In this study, the authors propose a hybrid automatic repeat request (HARQ)-based coding scheme that simultaneously reduces the crosstalk induced bus delay and provides multi-bit error protection while achieving high-energy savings. This is achieved by calculating two-dimensional parities and duplicating all the bits, which provide single error correction and six errors detection. The error correction reduces the performance degradation caused by retransmissions, which when combined with voltage swing reduction, due to its high error detection, high-energy savings are achieved. The results show that the proposed scheme reduces the energy consumption up to 51.7% as compared with other schemes while achieving the target link reliability level. Also, it shows improved network performance as compared with ARQ-based scheme and close to forward error correction-based schemes. |
| first_indexed | 2025-11-15T12:24:01Z |
| format | Article |
| id | upm-81436 |
| institution | Universiti Putra Malaysia |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-15T12:24:01Z |
| publishDate | 2019 |
| publisher | Institution of Engineering and Technology |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | upm-814362021-01-30T07:47:11Z http://psasir.upm.edu.my/id/eprint/81436/ Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip Flayyih, Wameedh N. Samsudin, Khairulmizam Hashim, Shaiful J. Ismail, Yehea Rokhani, Fakhrul Zaman In the presence of deep submicron noise, providing reliable and energy-efficient network on-chip operation is becoming a challenging objective. In this study, the authors propose a hybrid automatic repeat request (HARQ)-based coding scheme that simultaneously reduces the crosstalk induced bus delay and provides multi-bit error protection while achieving high-energy savings. This is achieved by calculating two-dimensional parities and duplicating all the bits, which provide single error correction and six errors detection. The error correction reduces the performance degradation caused by retransmissions, which when combined with voltage swing reduction, due to its high error detection, high-energy savings are achieved. The results show that the proposed scheme reduces the energy consumption up to 51.7% as compared with other schemes while achieving the target link reliability level. Also, it shows improved network performance as compared with ARQ-based scheme and close to forward error correction-based schemes. Institution of Engineering and Technology 2019 Article PeerReviewed text en http://psasir.upm.edu.my/id/eprint/81436/1/Multi-bit%20error%20control%20coding%20with%20limited%20correction%20for%20high-performance%20and%20energy-%20efficient%20network%20on%20chip.pdf Flayyih, Wameedh N. and Samsudin, Khairulmizam and Hashim, Shaiful J. and Ismail, Yehea and Rokhani, Fakhrul Zaman (2019) Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip. IET Circuits Devices & Systems, 14 (1). pp. 7-16. ISSN 1751-858X; ESSN: 1751-8598 https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2018.5282 10.1049/iet-cds.2018.5282 |
| spellingShingle | Flayyih, Wameedh N. Samsudin, Khairulmizam Hashim, Shaiful J. Ismail, Yehea Rokhani, Fakhrul Zaman Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip |
| title | Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip |
| title_full | Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip |
| title_fullStr | Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip |
| title_full_unstemmed | Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip |
| title_short | Multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip |
| title_sort | multi-bit error control coding with limited correction for high-performance and energy- efficient network on chip |
| url | http://psasir.upm.edu.my/id/eprint/81436/ http://psasir.upm.edu.my/id/eprint/81436/ http://psasir.upm.edu.my/id/eprint/81436/ http://psasir.upm.edu.my/id/eprint/81436/1/Multi-bit%20error%20control%20coding%20with%20limited%20correction%20for%20high-performance%20and%20energy-%20efficient%20network%20on%20chip.pdf |