Impact of intrinsic parameter fluctuation on the fault tolerance of L1 data cache

Impact of intrinsic parameter fluctuation on the fault tolerance of L1 data cache

As the semiconductor process technology continues to scale deeper into the nanometer region, the intrinsic parameter fluctuations will aggressively affect the performance and reliability of future microprocessors and System-on-Chip (SoC) applications. These system requires large SRAM arrays that occ...

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Bibliographic Details
Main Authors: Ahmed, Rabah Abood, Samsudin, Khairulmizam, Rokhani, Fakhrul Zaman
Format: Conference or Workshop Item
Language:English
Published: IEEE 2009
Online Access:http://psasir.upm.edu.my/id/eprint/69411/
http://psasir.upm.edu.my/id/eprint/69411/1/Impact%20of%20intrinsic%20parameter%20fluctuation%20on%20the%20fault%20tolerance%20of%20L1%20data%20cache.pdf

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