Design of ultra-low voltage and low-power CMOS current bleeding mixer
This paper presents an ultra-low voltage and low power current bleeding CMOS double balanced mixer targeted for ZigBee application in 2.4GHz operating frequency band. The proposed mixer uses a modified CMOS current bleeding mixer topology adapting the forward body bias design technique integrated wi...
| Main Authors: | , , |
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| Format: | Conference or Workshop Item |
| Language: | English |
| Published: |
IEEE
2014
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| Online Access: | http://psasir.upm.edu.my/id/eprint/69373/ http://psasir.upm.edu.my/id/eprint/69373/1/Design%20of%20ultra-low%20voltage%20and%20low-power%20CMOS%20current%20bleeding%20mixer.pdf |
| Summary: | This paper presents an ultra-low voltage and low power current bleeding CMOS double balanced mixer targeted for ZigBee application in 2.4GHz operating frequency band. The proposed mixer uses a modified CMOS current bleeding mixer topology adapting the forward body bias design technique integrated with a NMOS based current bleeding transistor, PMOS based local oscillator (LO) switching stage and on-chip inductors to achieve ultra-low voltage headroom operation down to 0.35V. The conversion gain is further enhanced by integrating an inductor at the gate of the bleeding transistor to reduce RF current leakage. The proposed architecture is simulated and verified in 0.13μm standard CMOS technology. The RC extracted simulation result shows a high conversion gain (CG) of 16dB, 1dB compression point (P1dB) at -17.65dBm, third-order intercept point (IIP3) of -7.45dBm and a noise figure (NF) of 18dB is achieved with a power consumption of 526μW. |
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