Design of 8-bit SAR-ADC CMOS

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Design of 8-bit SAR-ADC CMOS

Successive approximation analog-to-digital converter (ADC) implemented in a conventional 0.18μm CMOS technology with low voltage. The SAR composite of sample-and-hold dummy switch compensation was employed, comparator is low-voltage latched and realized based on current-mode approach, control logic...

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Bibliographic Details
Main Authors:	Hassan, Hur A., Abdul Halin, Izhal, Aris, Ishak, Hassan, Mohd Khair
Format:	Conference or Workshop Item
Language:	English
Published:	IEEE 2009
Online Access:	http://psasir.upm.edu.my/id/eprint/68879/ http://psasir.upm.edu.my/id/eprint/68879/1/Design%20of%208-bit%20SAR-ADC%20CMOS.pdf

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