APA (7th ed.) Citation

Mai, Y. C., Ang, T. B., Chin, K. Y., & Rokhani, F. Z. (2010). Interconnect area, delay and area-delay optimization for multi-level signaling on-chip bus. IEEE.

Chicago Style (17th ed.) Citation

Mai, Yoong Ching, Tun Boon Ang, Kock Yeong Chin, and Fakhrul Zaman Rokhani. Interconnect Area, Delay and Area-delay Optimization for Multi-level Signaling On-chip Bus. IEEE, 2010.

MLA (9th ed.) Citation

Mai, Yoong Ching, et al. Interconnect Area, Delay and Area-delay Optimization for Multi-level Signaling On-chip Bus. IEEE, 2010.