CMOS technology for increasing efficiency of clock gating techniques using tri-state buffer

QR Code

CMOS technology for increasing efficiency of clock gating techniques using tri-state buffer

Clock gating is an effective technique of decreasing dynamic power dissipation in synchronous design. One of the methods used to realize this goal is to mask the clock which goes to the unnecessary to use in specific time. This paper will present a comparative analysis of this clock gating technique...

Full description

Bibliographic Details
Main Authors:	Mohammed, Maan Hameed, Mohamed Khmag, Asem Ib., Rokhani, Fakhrul Zaman, Ramli, Abd Rahman
Format:	Article
Language:	English
Published:	Institute of Research and Development, Walailak University 2017
Online Access:	http://psasir.upm.edu.my/id/eprint/61131/ http://psasir.upm.edu.my/id/eprint/61131/1/CMOS%20technology%20for%20increasing%20efficiency%20of%20clock%20gating%20techniques%20using%20tri-state%20buffer.pdf

Similar Items

Clock Gating Assertion Check An Approach Towards Efficient Verification Closure On Clock Gating Functionality
by: Wang, Jian Zhong
Published: (2017)

Low power 130 nm CMOS Johnson Counter with clock gating technique
by: Amran, Nur Syuhadah, et al.
Published: (2018)

VLSI implementation of huffman design using FPGA with a comprehensive analysis of power restrictions
by: Mohammed, Maan Hameed, et al.
Published: (2015)

High-Performance CMOS Clock And Data Recovery Circuit
by: Tan, Kok Siang
Published: (2006)

Clock Gating Technique For Power Reduction In Digital Design
by: Khor, Peng Lim
Published: (2012)

A new lossless method of Huffman coding for text data compression and decompression process with FPGA implementation
by: Hameed, Maan, et al.
Published: (2016)

A 5Gbit/s CMOS clock and data recovery circuit
by: Sulaiman , Mohd Shahiman, et al.
Published: (2005)

Design of low voltage cmos tristate buffer
by: Nurul Huda, Binti Zulkifli.
Published: (2010)

A fully-integrated 5 Gbit/s CMOS clock and data recovery circuit
by: Tan, Kok Siang, et al.
Published: (2007)

Modified Data Encryption Standard Algorithm for Textbased Applications
by: Mohamed Khmag, Asem Ib.
Published: (2006)

Denoising of digital images using second generation wavelet transforms-hidden markov model
by: Khmag, Asem Ib Mohamed
Published: (2016)

A study and design of CMOS H-Tree clock distribution network in system-on-chip
by: Loo, Wei-Khee, et al.
Published: (2009)

Simulation and Analysis of Short Channel Effects on Bulk and Tri-Gate Multiple Input Floating Gate Mosfet
by: Mohd Maarof, Siti Nuur Basmin
Published: (2008)

Advanced encryption standard-XTS implementation in field programmable gate array hardware
by: Ahmed, Shakil, et al.
Published: (2015)

Energy-efficient clock synchronization technique for IoT
by: Onyeka, Ezema Ernest
Published: (2019)

An RF energy harvester system using UHF micropower CMOS rectifier based on a diode connected CMOS transistor
by: Shokrani, Mohammad Reza, et al.
Published: (2014)

Statistical analysis of power delay estimation in adder circuit using non-clocked pass gate families
by: Senthilpari, Chinnaiyan, et al.
Published: (2007)

The clock is ticking
by: Zawawi, Dahlia, et al.
Published: (2009)

Zero skew clock routing for fast clock tree generation
by: Reaz, Mamun Ibn, et al.
Published: (2008)

Clock Tree Generation: The Implementation Of Zero Skew Clock Net Router
by: Mohammad, Mohammad Azam
Published: (2006)

Editorial: Nursing education in the United Kingdom – clocks forward or clocks backward?
by: Shields, Linda, et al.
Published: (2011)

Technique of failure analysis for gate oxide defect of Bi-polar CMOS Diffuse (BCD) technology
by: Abdullah, Farisal
Published: (2013)

Chess digital clock
by: Rosmira, Roslan
Published: (2008)

Stickable beetle clock
by: Ariff, Ahmad Fairuz, et al.
Published: (2013)

Energy efficient on aspect of clock synchronization in a wireless sensor network
by: Al-Mekhlafi, Zeyad Ghaleb, et al.
Published: (2014)

Low Power Design Of 8b/10b Encoder And 10b/8b Decoder Using Clock Gating Technique
by: Ong, Ji Xian
Published: (2017)

Fast clock tree generation using exact zero skew clock routing algorithm
by: Reaz, Mamun Ibn, et al.
Published: (2009)

Development of solar digital clock
by: Mohd Hafeez, Mohd Nasir
Published: (2009)

An Efficient Architecture of 8-Bit CMOS Analog-To-Digital Converter
by: Tan, Philip Beow Yew
Published: (2000)

Implementation of CMOS oscillator for CMOS SAW resonator
by: Karim, Jamilah, et al.
Published: (2016)

Sagnac interferometry with a single atomic clock
by: Stevenson, Robin, et al.
Published: (2015)

Circuit design of a clock data recovery
by: Ashari, Zainab, et al.
Published: (2011)

Buffer to a recession
Published: (2009)

Numerical study of side gate junction-less transistor in on state
by: Dehzangi, Arash, et al.
Published: (2013)

Efficient Voltage/Current Spike Reduction by Active Gate Signaling
by: Boora, A., et al.
Published: (2009)

Multi-exposure laser speckle contrast imaging using a high frame rate CMOS sensor with a field programmable gate array
by: Sun, Shen, et al.
Published: (2015)

Design of high-speed clock and data recovery circuits
by: Tan, Kok Siang, et al.
Published: (2007)

Towards rotation sensing with a single atomic clock
by: Fernholz, Thomas, et al.
Published: (2016)

Bridging clock gaps in Mega-Constellation LEO satellites
by: Wang, Kan, et al.
Published: (2022)

LEO satellite clock analysis and prediction for positioning applications
by: Wang, Kan, et al.
Published: (2021)