Cost-efficient standard cell library timing and power validation techniques

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Cost-efficient standard cell library timing and power validation techniques

A standard cell library contains functional blocks with known electrical characteristics,which are characterized to obtain the following parameters: propagation delay, output transition time, power representation, and capacitance. Standard cell libraries are widely applied by industry designers to t...

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Bibliographic Details
Main Author:	Al-Frajat, Jaafar Khadair Kadam
Format:	Thesis
Language:	English
Published:	2015
Subjects:	Digital integrated circuits - Design and construction Application-specific integrated circuits
Online Access:	http://psasir.upm.edu.my/id/eprint/56224/ http://psasir.upm.edu.my/id/eprint/56224/1/FK%202015%2025.pdf

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