Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array

Orthogonal frequency division multiplexing systems suffer from one main drawback which is a high peak-to-average power ratio (PAPR) that leads to power efficiency degradation and when feed to a power amplifier operating in the nonlinear region yields adjacent channel interference and inferior bit er...

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Main Authors: Varahram, Pooria, Mohd Ali, Borhanuddin
Format: Article
Language:English
Published: Springer 2015
Online Access:http://psasir.upm.edu.my/id/eprint/45069/
http://psasir.upm.edu.my/id/eprint/45069/1/PGA.pdf
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author Varahram, Pooria
Mohd Ali, Borhanuddin
author_facet Varahram, Pooria
Mohd Ali, Borhanuddin
author_sort Varahram, Pooria
building UPM Institutional Repository
collection Online Access
description Orthogonal frequency division multiplexing systems suffer from one main drawback which is a high peak-to-average power ratio (PAPR) that leads to power efficiency degradation and when feed to a power amplifier operating in the nonlinear region yields adjacent channel interference and inferior bit error rate performance. There are many methods to overcome this drawback, one example of which is partial transmit sequence (PTS). Here implementation of a proposed PTS on field programmable gate array platform to show the feasibility of the PAPR reduction scheme is carried out. It has been shown that the proposed PTS scheme is significantly simpler as compared to the conventional methods and integration of this scheme with digital pre-distortion technique improves the system efficiency, suppressed out-of-band distortion and hence, prolong battery life. The simulations have been carried out with QPSK modulation and inverse fast Fourier transform with 512 subcarriers. The implementation results show in average 21% reduction in hardware resource and almost 18% conservation in total power consumption by applying the new PTS scheme while its PAPR performance remains comparable to the conventional PTS method.
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spelling upm-450692021-04-22T01:39:56Z http://psasir.upm.edu.my/id/eprint/45069/ Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array Varahram, Pooria Mohd Ali, Borhanuddin Orthogonal frequency division multiplexing systems suffer from one main drawback which is a high peak-to-average power ratio (PAPR) that leads to power efficiency degradation and when feed to a power amplifier operating in the nonlinear region yields adjacent channel interference and inferior bit error rate performance. There are many methods to overcome this drawback, one example of which is partial transmit sequence (PTS). Here implementation of a proposed PTS on field programmable gate array platform to show the feasibility of the PAPR reduction scheme is carried out. It has been shown that the proposed PTS scheme is significantly simpler as compared to the conventional methods and integration of this scheme with digital pre-distortion technique improves the system efficiency, suppressed out-of-band distortion and hence, prolong battery life. The simulations have been carried out with QPSK modulation and inverse fast Fourier transform with 512 subcarriers. The implementation results show in average 21% reduction in hardware resource and almost 18% conservation in total power consumption by applying the new PTS scheme while its PAPR performance remains comparable to the conventional PTS method. Springer 2015 Article PeerReviewed text en http://psasir.upm.edu.my/id/eprint/45069/1/PGA.pdf Varahram, Pooria and Mohd Ali, Borhanuddin (2015) Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array. Wireless Personal Communications, 82. pp. 1863-1875. ISSN 1572-834X; ESSN: 0929-6212 https://link.springer.com/article/10.1007/s11277-015-2319-0 10.1007/s11277-015-2319-0
spellingShingle Varahram, Pooria
Mohd Ali, Borhanuddin
Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array
title Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array
title_full Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array
title_fullStr Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array
title_full_unstemmed Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array
title_short Implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array
title_sort implementation of a low complexity peak-to-average power ratio reduction scheme on field programmable gate array
url http://psasir.upm.edu.my/id/eprint/45069/
http://psasir.upm.edu.my/id/eprint/45069/
http://psasir.upm.edu.my/id/eprint/45069/
http://psasir.upm.edu.my/id/eprint/45069/1/PGA.pdf