Investigation and statistical simulation of variation aware 14nm SRAM cache memory architecture

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Investigation and statistical simulation of variation aware 14nm SRAM cache memory architecture

Aggressive technology scaling to 14 nm technology node increases variability in transistors performance and introduces serious reliability challenges to the design of microprocessors. This creates several challenges in building reliable systems from transistors with unpredictability of delay. Scali...

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Bibliographic Details
Main Author:	Pour, Somayeh Rahimi
Format:	Thesis
Language:	English
Published:	2011
Subjects:	Cache memory Reliability (Engineering) - Statistical methods
Online Access:	http://psasir.upm.edu.my/id/eprint/41628/ http://psasir.upm.edu.my/id/eprint/41628/1/FK%202011%20121R.pdf

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