Design of a high speed and low latency crypto-processor ASIC

Design of a high speed and low latency crypto-processor ASIC

This paper presents the design of an ultra high speed crypto-processor for next generation IT security. It addresses the next generation IT security requirements: the resistance against all attacks and high speed with low latency. The proposed processor is capable of generating cryptographically sec...

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Bibliographic Details
Main Authors: Ali, Md. Liakot, Roy, Niranjan, Faisal, Fazle Elahi, Mohd Ali, Mohd Alauddin, Aris, Ishak
Format: Conference or Workshop Item
Language:English
Published: IEEE 2008
Online Access:http://psasir.upm.edu.my/id/eprint/37530/
http://psasir.upm.edu.my/id/eprint/37530/1/Design%20of%20a%20high%20speed%20and%20low%20latency%20crypto-processor%20ASIC.pdf

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