Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip
Achieving reliable operation under the influence of deep-submicrometer noise sources including crosstalk noise at low voltage operation is a major challenge for network on chip links. In this paper, we propose a coding scheme that simultaneously addresses crosstalk effects on signal delay and detect...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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Institute of Electrical and Electronics Engineers
2014
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| Online Access: | http://psasir.upm.edu.my/id/eprint/36930/ http://psasir.upm.edu.my/id/eprint/36930/1/Crosstalk.pdf |
| _version_ | 1848848469504032768 |
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| author | Flayyih, Wameedh N. Samsudin, Khairulmizam Hashim, Shaiful Jahari Rokhani, Fakhrul Zaman Ismail, Yehea I. |
| author_facet | Flayyih, Wameedh N. Samsudin, Khairulmizam Hashim, Shaiful Jahari Rokhani, Fakhrul Zaman Ismail, Yehea I. |
| author_sort | Flayyih, Wameedh N. |
| building | UPM Institutional Repository |
| collection | Online Access |
| description | Achieving reliable operation under the influence of deep-submicrometer noise sources including crosstalk noise at low voltage operation is a major challenge for network on chip links. In this paper, we propose a coding scheme that simultaneously addresses crosstalk effects on signal delay and detects up to seven random errors through wire duplication and simple parity checks calculated over the rows and columns of the two-dimensional data. This high error detection capability enables the reduction of operating voltage on the wire leading to energy saving. The results show that the proposed scheme reduces the energy consumption up to 53% as compared to other schemes at iso-reliability performance despite the increase in the overhead number of wires. In addition, it has small penalty on the network performance, represented by the average latency and comparable codec area overhead to other schemes. |
| first_indexed | 2025-11-15T09:35:00Z |
| format | Article |
| id | upm-36930 |
| institution | Universiti Putra Malaysia |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-15T09:35:00Z |
| publishDate | 2014 |
| publisher | Institute of Electrical and Electronics Engineers |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | upm-369302015-09-15T04:00:11Z http://psasir.upm.edu.my/id/eprint/36930/ Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip Flayyih, Wameedh N. Samsudin, Khairulmizam Hashim, Shaiful Jahari Rokhani, Fakhrul Zaman Ismail, Yehea I. Achieving reliable operation under the influence of deep-submicrometer noise sources including crosstalk noise at low voltage operation is a major challenge for network on chip links. In this paper, we propose a coding scheme that simultaneously addresses crosstalk effects on signal delay and detects up to seven random errors through wire duplication and simple parity checks calculated over the rows and columns of the two-dimensional data. This high error detection capability enables the reduction of operating voltage on the wire leading to energy saving. The results show that the proposed scheme reduces the energy consumption up to 53% as compared to other schemes at iso-reliability performance despite the increase in the overhead number of wires. In addition, it has small penalty on the network performance, represented by the average latency and comparable codec area overhead to other schemes. Institute of Electrical and Electronics Engineers 2014 Article PeerReviewed application/pdf en http://psasir.upm.edu.my/id/eprint/36930/1/Crosstalk.pdf Flayyih, Wameedh N. and Samsudin, Khairulmizam and Hashim, Shaiful Jahari and Rokhani, Fakhrul Zaman and Ismail, Yehea I. (2014) Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip. IEEE Transactions on Circuits and Systems I: Regular Papers, 61 (7). pp. 2034-2047. ISSN 1549-8328 10.1109/TCSI.2013.2295952 |
| spellingShingle | Flayyih, Wameedh N. Samsudin, Khairulmizam Hashim, Shaiful Jahari Rokhani, Fakhrul Zaman Ismail, Yehea I. Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip |
| title | Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip |
| title_full | Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip |
| title_fullStr | Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip |
| title_full_unstemmed | Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip |
| title_short | Crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip |
| title_sort | crosstalk-aware multiple error detection scheme based on two-dimensional parities for energy efficient network on chip |
| url | http://psasir.upm.edu.my/id/eprint/36930/ http://psasir.upm.edu.my/id/eprint/36930/ http://psasir.upm.edu.my/id/eprint/36930/1/Crosstalk.pdf |