Optimality of bus-invert coding
Dynamic power dissipation on I/O buses is an important issue for high-speed communication between chips. One can use coding techniques to reduce the number of transitions, which will reduce the dynamic power. Bus-invert coding is one popular technique for interchip buses, where the dominant contribu...
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| Format: | Article |
| Language: | English English |
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Institute of Electrical and Electronics Engineers Inc.
2009
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| Online Access: | http://psasir.upm.edu.my/id/eprint/15953/ http://psasir.upm.edu.my/id/eprint/15953/1/Optimality%20of%20bus.pdf |
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| author | Rokhani, Fakhrul Zaman Kan, Wen Chih Kieffer, John Sobelman, Gerald E. |
| author_facet | Rokhani, Fakhrul Zaman Kan, Wen Chih Kieffer, John Sobelman, Gerald E. |
| author_sort | Rokhani, Fakhrul Zaman |
| building | UPM Institutional Repository |
| collection | Online Access |
| description | Dynamic power dissipation on I/O buses is an important issue for high-speed communication between chips. One can use coding techniques to reduce the number of transitions, which will reduce the dynamic power. Bus-invert coding is one popular technique for interchip buses, where the dominant contribution is from the self-capacitance of the wires. This algorithm uses an invert line to signal whether the bus data are in its original or an inverted form. While the method appears to be a greedy algorithm, we show that it is, in fact, an optimal strategy. To do so, we first represent the bus and invert line using a trellis diagram. Then, we show that applying bus-invert coding to a sequence of words gives the same result as would be obtained by using the Viterbi algorithm, which is known to be optimal. We also show that partitioning an M-bit bus into P subbuses and using bus-invert coding on each subbus can be described as applying the Viterbi algorithm on a 2P-state trellis. |
| first_indexed | 2025-11-15T08:05:16Z |
| format | Article |
| id | upm-15953 |
| institution | Universiti Putra Malaysia |
| institution_category | Local University |
| language | English English |
| last_indexed | 2025-11-15T08:05:16Z |
| publishDate | 2009 |
| publisher | Institute of Electrical and Electronics Engineers Inc. |
| recordtype | eprints |
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| spelling | upm-159532015-10-30T02:22:42Z http://psasir.upm.edu.my/id/eprint/15953/ Optimality of bus-invert coding Rokhani, Fakhrul Zaman Kan, Wen Chih Kieffer, John Sobelman, Gerald E. Dynamic power dissipation on I/O buses is an important issue for high-speed communication between chips. One can use coding techniques to reduce the number of transitions, which will reduce the dynamic power. Bus-invert coding is one popular technique for interchip buses, where the dominant contribution is from the self-capacitance of the wires. This algorithm uses an invert line to signal whether the bus data are in its original or an inverted form. While the method appears to be a greedy algorithm, we show that it is, in fact, an optimal strategy. To do so, we first represent the bus and invert line using a trellis diagram. Then, we show that applying bus-invert coding to a sequence of words gives the same result as would be obtained by using the Viterbi algorithm, which is known to be optimal. We also show that partitioning an M-bit bus into P subbuses and using bus-invert coding on each subbus can be described as applying the Viterbi algorithm on a 2P-state trellis. Institute of Electrical and Electronics Engineers Inc. 2009 Article PeerReviewed application/pdf en http://psasir.upm.edu.my/id/eprint/15953/1/Optimality%20of%20bus.pdf Rokhani, Fakhrul Zaman and Kan, Wen Chih and Kieffer, John and Sobelman, Gerald E. (2009) Optimality of bus-invert coding. IEEE Transactions on Circuits and Systems II: Express Briefs, 55 (11). pp. 1134-1138. ISSN 1549-7747; ESSN: 1558-3791 10.1109/TCSII.2008.2002564 English |
| spellingShingle | Rokhani, Fakhrul Zaman Kan, Wen Chih Kieffer, John Sobelman, Gerald E. Optimality of bus-invert coding |
| title | Optimality of bus-invert coding |
| title_full | Optimality of bus-invert coding |
| title_fullStr | Optimality of bus-invert coding |
| title_full_unstemmed | Optimality of bus-invert coding |
| title_short | Optimality of bus-invert coding |
| title_sort | optimality of bus-invert coding |
| url | http://psasir.upm.edu.my/id/eprint/15953/ http://psasir.upm.edu.my/id/eprint/15953/ http://psasir.upm.edu.my/id/eprint/15953/1/Optimality%20of%20bus.pdf |