FPGA implementation of the complex division in digital predistortion linearizer
Since division is not a standard operation for DSP processors and because it can be implemented in several different ways, there is no specific algorithm clearly to choose. It all depends on the requirements, such as accuracy, size and speed. A few suitable algorithms should be selected and implemen...
| Main Authors: | , , , , |
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| Format: | Article |
| Language: | English |
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American-Eurasian Network for Scientific Information
2010
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| Online Access: | http://psasir.upm.edu.my/id/eprint/14812/ http://psasir.upm.edu.my/id/eprint/14812/1/FPGA%20implementation%20of%20the%20complex%20division%20in%20digital%20predistortion%20linearizer.pdf |
| _version_ | 1848842500422238208 |
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| author | Mohammady, Somayeh Varahram, Pooria Mohd Sidek, Roslina Hamidon, Mohd Nizar Sulaiman, Nasri |
| author_facet | Mohammady, Somayeh Varahram, Pooria Mohd Sidek, Roslina Hamidon, Mohd Nizar Sulaiman, Nasri |
| author_sort | Mohammady, Somayeh |
| building | UPM Institutional Repository |
| collection | Online Access |
| description | Since division is not a standard operation for DSP processors and because it can be implemented in several different ways, there is no specific algorithm clearly to choose. It all depends on the requirements, such as accuracy, size and speed. A few suitable algorithms should be selected and implemented in VHDL for evaluation. The implementation is expected to be a part of an existing baseband processor and should be able to handle the high speed requirements while keeping the size down. Here we implement complex division based on Newton Raphson method. This divider will be used in the Digital Predistortion for adaptation of the power amplifiers. Based on the requirements of the input signal, the divider that is implemented here has different features and makes it suitable for digital communication where we deal with complex values. The results of simulation show improvement in hardware resources as compare to other methods. |
| first_indexed | 2025-11-15T08:00:07Z |
| format | Article |
| id | upm-14812 |
| institution | Universiti Putra Malaysia |
| institution_category | Local University |
| language | English |
| last_indexed | 2025-11-15T08:00:07Z |
| publishDate | 2010 |
| publisher | American-Eurasian Network for Scientific Information |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | upm-148122019-04-10T01:49:10Z http://psasir.upm.edu.my/id/eprint/14812/ FPGA implementation of the complex division in digital predistortion linearizer Mohammady, Somayeh Varahram, Pooria Mohd Sidek, Roslina Hamidon, Mohd Nizar Sulaiman, Nasri Since division is not a standard operation for DSP processors and because it can be implemented in several different ways, there is no specific algorithm clearly to choose. It all depends on the requirements, such as accuracy, size and speed. A few suitable algorithms should be selected and implemented in VHDL for evaluation. The implementation is expected to be a part of an existing baseband processor and should be able to handle the high speed requirements while keeping the size down. Here we implement complex division based on Newton Raphson method. This divider will be used in the Digital Predistortion for adaptation of the power amplifiers. Based on the requirements of the input signal, the divider that is implemented here has different features and makes it suitable for digital communication where we deal with complex values. The results of simulation show improvement in hardware resources as compare to other methods. American-Eurasian Network for Scientific Information 2010 Article PeerReviewed text en http://psasir.upm.edu.my/id/eprint/14812/1/FPGA%20implementation%20of%20the%20complex%20division%20in%20digital%20predistortion%20linearizer.pdf Mohammady, Somayeh and Varahram, Pooria and Mohd Sidek, Roslina and Hamidon, Mohd Nizar and Sulaiman, Nasri (2010) FPGA implementation of the complex division in digital predistortion linearizer. Australian Journal of Basic and Applied Sciences, 4 (10). pp. 5028-5037. ISSN 1991-8178 http://www.ajbasweb.com/old/ajbas_octoberr_2010.html |
| spellingShingle | Mohammady, Somayeh Varahram, Pooria Mohd Sidek, Roslina Hamidon, Mohd Nizar Sulaiman, Nasri FPGA implementation of the complex division in digital predistortion linearizer |
| title | FPGA implementation of the complex division in digital predistortion linearizer |
| title_full | FPGA implementation of the complex division in digital predistortion linearizer |
| title_fullStr | FPGA implementation of the complex division in digital predistortion linearizer |
| title_full_unstemmed | FPGA implementation of the complex division in digital predistortion linearizer |
| title_short | FPGA implementation of the complex division in digital predistortion linearizer |
| title_sort | fpga implementation of the complex division in digital predistortion linearizer |
| url | http://psasir.upm.edu.my/id/eprint/14812/ http://psasir.upm.edu.my/id/eprint/14812/ http://psasir.upm.edu.my/id/eprint/14812/1/FPGA%20implementation%20of%20the%20complex%20division%20in%20digital%20predistortion%20linearizer.pdf |