70-Gb/s amplitude-shift-keyed system with 10-GHz clock recovery circuit using duty cycle division multiplexing

70-Gb/s amplitude-shift-keyed system with 10-GHz clock recovery circuit using duty cycle division multiplexing

The performance of ASK over DCDM for up to seven channels is reported. The aggregate bit rate of 70 Gb/s is achieved with only 160-GHz modulation bandwidth. The clock and data recovery are realized at 10-GHz clock rate, which is very economic and efficient. At 7 × 10 Gb/s, the worst receiver sensiti...

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Bibliographic Details
Main Authors: Mahdiraji, Ghafour Amouzad, Abdullah, Mohamad Khazani, Mokhtar, Makhfudzah, Mohammadi, Amin Malek, Abas, Ahmad Fauzi, Mohd Basir, Safuraa, Raja Abdullah, Raja Syamsul Azmir
Format: Article
Language:English
Published: Springer 2010
Online Access:http://psasir.upm.edu.my/id/eprint/11439/
http://psasir.upm.edu.my/id/eprint/11439/1/70.pdf

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