The Design of Low Power CMOS SRAM Subsystems
The low power circuit design technique has been the trend in developing portable and smaller size electronic products, especially for communication peripherals. In the limitation on the device technology, integrated circuit design work has played an important role in performing various low power tec...
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| Format: | Thesis |
| Language: | English English |
| Published: |
2001
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| Online Access: | http://psasir.upm.edu.my/id/eprint/11022/ http://psasir.upm.edu.my/id/eprint/11022/1/FK_2001_39_A.pdf |
| _version_ | 1848841535767969792 |
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| author | Lee, Chu Liang |
| author_facet | Lee, Chu Liang |
| author_sort | Lee, Chu Liang |
| building | UPM Institutional Repository |
| collection | Online Access |
| description | The low power circuit design technique has been the trend in developing portable and smaller size electronic products, especially for communication peripherals. In the limitation on the device technology, integrated circuit design work has played an important role in performing various low power techniques. This thesis presents the design of low power Complementary Metal Oxide Semiconductor
(CMOS) Static Random Access Memory (SRAM) Subsystems. CMOS technology performs much lower static power dissipation compares to other technologies. The implementation of this design by using 3.3 V supply voltage has effectively reduced
the dynamic power dissipation of the circuitry. Low power is achieved by implementing 6T -memory cell. Low power techniques are also achieved on capacitance reduction by using divided word-line structure for address decoder.
Finally the low power is achieved by the operating voltage reduction using current-mode sensing technique for sense amplifier with the pre-charge voltage of Vdd/2. |
| first_indexed | 2025-11-15T07:44:47Z |
| format | Thesis |
| id | upm-11022 |
| institution | Universiti Putra Malaysia |
| institution_category | Local University |
| language | English English |
| last_indexed | 2025-11-15T07:44:47Z |
| publishDate | 2001 |
| recordtype | eprints |
| repository_type | Digital Repository |
| spelling | upm-110222011-07-19T03:26:09Z http://psasir.upm.edu.my/id/eprint/11022/ The Design of Low Power CMOS SRAM Subsystems Lee, Chu Liang The low power circuit design technique has been the trend in developing portable and smaller size electronic products, especially for communication peripherals. In the limitation on the device technology, integrated circuit design work has played an important role in performing various low power techniques. This thesis presents the design of low power Complementary Metal Oxide Semiconductor (CMOS) Static Random Access Memory (SRAM) Subsystems. CMOS technology performs much lower static power dissipation compares to other technologies. The implementation of this design by using 3.3 V supply voltage has effectively reduced the dynamic power dissipation of the circuitry. Low power is achieved by implementing 6T -memory cell. Low power techniques are also achieved on capacitance reduction by using divided word-line structure for address decoder. Finally the low power is achieved by the operating voltage reduction using current-mode sensing technique for sense amplifier with the pre-charge voltage of Vdd/2. 2001-06 Thesis NonPeerReviewed application/pdf en http://psasir.upm.edu.my/id/eprint/11022/1/FK_2001_39_A.pdf Lee, Chu Liang (2001) The Design of Low Power CMOS SRAM Subsystems. Masters thesis, Universiti Putra Malaysia. Metal oxide semiconductors, Complementary - Design Random access memory English |
| spellingShingle | Metal oxide semiconductors, Complementary - Design Random access memory Lee, Chu Liang The Design of Low Power CMOS SRAM Subsystems |
| title | The Design of Low Power CMOS SRAM Subsystems |
| title_full | The Design of Low Power CMOS SRAM Subsystems |
| title_fullStr | The Design of Low Power CMOS SRAM Subsystems |
| title_full_unstemmed | The Design of Low Power CMOS SRAM Subsystems |
| title_short | The Design of Low Power CMOS SRAM Subsystems |
| title_sort | design of low power cmos sram subsystems |
| topic | Metal oxide semiconductors, Complementary - Design Random access memory |
| url | http://psasir.upm.edu.my/id/eprint/11022/ http://psasir.upm.edu.my/id/eprint/11022/1/FK_2001_39_A.pdf |