An Efficient Architecture of 8-Bit CMOS Analog-To-Digital Converter

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An Efficient Architecture of 8-Bit CMOS Analog-To-Digital Converter

An 8-bit CMOS analog-to-digital converter (ADC) has been designed by using a more efficient architecture, which is known as the simplified multistep flash architecture. This architecture can ultimately reduce the number of comparators needed in an ADC. For the same resolutions, the full-flash archit...

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Bibliographic Details
Main Author:	Tan, Philip Beow Yew
Format:	Thesis
Language:	English English
Published:	2000
Subjects:	Analog-to-digital converters - Design and construction Metal oxide semiconductors,Complementary
Online Access:	http://psasir.upm.edu.my/id/eprint/10664/ http://psasir.upm.edu.my/id/eprint/10664/1/FK_2000_47.pdf

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